The 211 registers of GMAC (Gigabit Ethernet MAC), from 0x40050000, with their reset value and every field. The ATSAME70N21B has 2806 registers in 62 peripherals, one page each.
GMAC Gigabit Ethernet MAC
GMAC_NCRNetwork Control Register
Address
0x40050000
Reset
0x00000000
Access
read/write
Size
32-bit
17 fields
Field
Bits
What it does
TXLPIEN
19
Enable LPI Transmission
FNP
18
Flush Next Packet
TXPBPF
17
Transmit PFC Priority-based Pause Frame
ENPBPR
16
Enable PFC Priority-based Pause Reception
SRTSM
15
Store Receive Time Stamp to Memory
TXZQPF
12
Transmit Zero Quantum Pause Frame
TXPF
11
Transmit Pause Frame
THALT
10
Transmit Halt
TSTART
9
Start Transmission
BP
8
Back pressure
WESTAT
7
Write Enable for Statistics Registers
INCSTAT
6
Increment Statistics Registers
CLRSTAT
5
Clear Statistics Registers
MPE
4
Management Port Enable
TXEN
3
Transmit Enable
RXEN
2
Receive Enable
LBL
1
Loop Back Local
GMAC_NCFGRNetwork Configuration Register
Address
0x40050004
Reset
0x00000000
Access
read/write
Size
32-bit
23 fields
Field
Bits
What it does
IRXER
30
Ignore IPG GRXER
RXBP
29
Receive Bad Preamble
IPGSEN
28
IP Stretch Enable
IRXFCS
26
Ignore RX FCS
EFRHD
25
Enable Frames Received in Half Duplex
RXCOEN
24
Receive Checksum Offload Enable
DCPF
23
Disable Copy of Pause Frames
DBW
22:21
Data Bus Width
CLK
20:18
MDC CLock Division
0 MCK divided by 8 (MCK up to 20 MHz)
1 MCK divided by 16 (MCK up to 40 MHz)
2 MCK divided by 32 (MCK up to 80 MHz)
3 MCK divided by 48 (MCK up to 120 MHz)
4 MCK divided by 64 (MCK up to 160 MHz)
5 MCK divided by 96 (MCK up to 240 MHz)
RFCS
17
Remove FCS
LFERD
16
Length Field Error Frame Discard
RXBUFO
15:14
Receive Buffer Offset
PEN
13
Pause Enable
RTY
12
Retry Test
MAXFS
8
1536 Maximum Frame Size
UNIHEN
7
Unicast Hash Enable
MTIHEN
6
Multicast Hash Enable
NBC
5
No Broadcast
CAF
4
Copy All Frames
JFRAME
3
Jumbo Frame Size
DNVLAN
2
Discard Non-VLAN FRAMES
FD
1
Full Duplex
SPD
0
Speed
GMAC_NSRNetwork Status Register
Address
0x40050008
Reset
0x00000000
Access
read only
Size
32-bit
3 fields
Field
Bits
What it does
RXLPIS
7
LPI Indication
IDLE
2
PHY Management Logic Idle
MDIO
1
MDIO Input Status
GMAC_URUser Register
Address
0x4005000C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
RMII
0
Reduced MII Mode
GMAC_DCFGRDMA Configuration Register
Address
0x40050010
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
Field
Bits
What it does
DDRP
24
DMA Discard Receive Packets
DRBS
23:16
DMA Receive Buffer Size
TXCOEN
11
Transmitter Checksum Generation Offload Enable
TXPBMS
10
Transmitter Packet Buffer Memory Size Select
RXBMS
9:8
Receiver Packet Buffer Memory Size Select
0 4/8 Kbyte Memory Size
1 4/4 Kbytes Memory Size
2 4/2 Kbytes Memory Size
3 4 Kbytes Memory Size
ESPA
7
Endian Swap Mode Enable for Packet Data Accesses
ESMA
6
Endian Swap Mode Enable for Management Descriptor Accesses
FBLDO
4:0
Fixed Burst Length for DMA Data Operations:
1 00001: Always use SINGLE AHB bursts
4 001xx: Attempt to use INCR4 AHB bursts (Default)
8 01xxx: Attempt to use INCR8 AHB bursts
16 1xxxx: Attempt to use INCR16 AHB bursts
GMAC_TSRTransmit Status Register
Address
0x40050014
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
Field
Bits
What it does
HRESP
8
HRESP Not OK
TXCOMP
5
Transmit Complete
TFC
4
Transmit Frame Corruption Due to AHB Error
TXGO
3
Transmit Go
RLE
2
Retry Limit Exceeded
COL
1
Collision Occurred
UBR
0
Used Bit Read
GMAC_RBQBReceive Buffer Queue Base Address Register
Address
0x40050018
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:2
Receive Buffer Queue Base Address
GMAC_TBQBTransmit Buffer Queue Base Address Register
Address
0x4005001C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:2
Transmit Buffer Queue Base Address
GMAC_RSRReceive Status Register
Address
0x40050020
Reset
0x00000000
Access
read/write
Size
32-bit
4 fields
Field
Bits
What it does
HNO
3
HRESP Not OK
RXOVR
2
Receive Overrun
REC
1
Frame Received
BNA
0
Buffer Not Available
GMAC_ISRInterrupt Status Register
Address
0x40050024
Reset
0x00000000
Access
read only
Size
32-bit
25 fields
Field
Bits
What it does
TSUTIMCOMP
29
TSU Timer Comparison
WOL
28
Wake On LAN
RXLPISBC
27
Receive LPI indication Status Bit Change
SRI
26
TSU Seconds Register Increment
PDRSFT
25
PDelay Response Frame Transmitted
PDRQFT
24
PDelay Request Frame Transmitted
PDRSFR
23
PDelay Response Frame Received
PDRQFR
22
PDelay Request Frame Received
SFT
21
PTP Sync Frame Transmitted
DRQFT
20
PTP Delay Request Frame Transmitted
SFR
19
PTP Sync Frame Received
DRQFR
18
PTP Delay Request Frame Received
PFTR
14
Pause Frame Transmitted
PTZ
13
Pause Time Zero
PFNZ
12
Pause Frame with Non-zero Pause Quantum Received
HRESP
11
HRESP Not OK
ROVR
10
Receive Overrun
TCOMP
7
Transmit Complete
TFC
6
Transmit Frame Corruption Due to AHB Error
RLEX
5
Retry Limit Exceeded
TUR
4
Transmit Underrun
TXUBR
3
TX Used Bit Read
RXUBR
2
RX Used Bit Read
RCOMP
1
Receive Complete
MFS
0
Management Frame Sent
GMAC_IERInterrupt Enable Register
Address
0x40050028
Reset
0x00000000
Access
write only
Size
32-bit
26 fields
Field
Bits
What it does
TSUTIMCOMP
29
TSU Timer Comparison
WOL
28
Wake On LAN
RXLPISBC
27
Enable RX LPI Indication
SRI
26
TSU Seconds Register Increment
PDRSFT
25
PDelay Response Frame Transmitted
PDRQFT
24
PDelay Request Frame Transmitted
PDRSFR
23
PDelay Response Frame Received
PDRQFR
22
PDelay Request Frame Received
SFT
21
PTP Sync Frame Transmitted
DRQFT
20
PTP Delay Request Frame Transmitted
SFR
19
PTP Sync Frame Received
DRQFR
18
PTP Delay Request Frame Received
EXINT
15
External Interrupt
PFTR
14
Pause Frame Transmitted
PTZ
13
Pause Time Zero
PFNZ
12
Pause Frame with Non-zero Pause Quantum Received
HRESP
11
HRESP Not OK
ROVR
10
Receive Overrun
TCOMP
7
Transmit Complete
TFC
6
Transmit Frame Corruption Due to AHB Error
RLEX
5
Retry Limit Exceeded or Late Collision
TUR
4
Transmit Underrun
TXUBR
3
TX Used Bit Read
RXUBR
2
RX Used Bit Read
RCOMP
1
Receive Complete
MFS
0
Management Frame Sent
GMAC_IDRInterrupt Disable Register
Address
0x4005002C
Reset
0x00000000
Access
write only
Size
32-bit
26 fields
Field
Bits
What it does
TSUTIMCOMP
29
TSU Timer Comparison
WOL
28
Wake On LAN
RXLPISBC
27
Enable RX LPI Indication
SRI
26
TSU Seconds Register Increment
PDRSFT
25
PDelay Response Frame Transmitted
PDRQFT
24
PDelay Request Frame Transmitted
PDRSFR
23
PDelay Response Frame Received
PDRQFR
22
PDelay Request Frame Received
SFT
21
PTP Sync Frame Transmitted
DRQFT
20
PTP Delay Request Frame Transmitted
SFR
19
PTP Sync Frame Received
DRQFR
18
PTP Delay Request Frame Received
EXINT
15
External Interrupt
PFTR
14
Pause Frame Transmitted
PTZ
13
Pause Time Zero
PFNZ
12
Pause Frame with Non-zero Pause Quantum Received
HRESP
11
HRESP Not OK
ROVR
10
Receive Overrun
TCOMP
7
Transmit Complete
TFC
6
Transmit Frame Corruption Due to AHB Error
RLEX
5
Retry Limit Exceeded or Late Collision
TUR
4
Transmit Underrun
TXUBR
3
TX Used Bit Read
RXUBR
2
RX Used Bit Read
RCOMP
1
Receive Complete
MFS
0
Management Frame Sent
GMAC_IMRInterrupt Mask Register
Address
0x40050030
Reset
0x00000000
Access
read/write
Size
32-bit
26 fields
Field
Bits
What it does
TSUTIMCOMP
29
TSU Timer Comparison
WOL
28
Wake On LAN
RXLPISBC
27
Enable RX LPI Indication
SRI
26
TSU Seconds Register Increment
PDRSFT
25
PDelay Response Frame Transmitted
PDRQFT
24
PDelay Request Frame Transmitted
PDRSFR
23
PDelay Response Frame Received
PDRQFR
22
PDelay Request Frame Received
SFT
21
PTP Sync Frame Transmitted
DRQFT
20
PTP Delay Request Frame Transmitted
SFR
19
PTP Sync Frame Received
DRQFR
18
PTP Delay Request Frame Received
EXINT
15
External Interrupt
PFTR
14
Pause Frame Transmitted
PTZ
13
Pause Time Zero
PFNZ
12
Pause Frame with Non-zero Pause Quantum Received
HRESP
11
HRESP Not OK
ROVR
10
Receive Overrun
TCOMP
7
Transmit Complete
TFC
6
Transmit Frame Corruption Due to AHB Error
RLEX
5
Retry Limit Exceeded
TUR
4
Transmit Underrun
TXUBR
3
TX Used Bit Read
RXUBR
2
RX Used Bit Read
RCOMP
1
Receive Complete
MFS
0
Management Frame Sent
GMAC_MANPHY Maintenance Register
Address
0x40050034
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
Field
Bits
What it does
CLTTO
30
Clause 22 Operation
OP
29:28
Operation
PHYA
27:23
PHY Address
REGA
22:18
Register Address
WTN
17:16
Write Ten
DATA
15:0
PHY Data
WZO
31
Write ZERO
GMAC_RPQReceived Pause Quantum Register
Address
0x40050038
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RPQ
15:0
Received Pause Quantum
GMAC_TPQTransmit Pause Quantum Register
Address
0x4005003C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
TPQ
15:0
Transmit Pause Quantum
GMAC_TPSFTX Partial Store and Forward Register
Address
0x40050040
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
TPB1ADR
11:0
Transmit Partial Store and Forward Address
ENTXP
31
Enable TX Partial Store and Forward Operation
GMAC_RPSFRX Partial Store and Forward Register
Address
0x40050044
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
RPB1ADR
11:0
Receive Partial Store and Forward Address
ENRXP
31
Enable RX Partial Store and Forward Operation
GMAC_RJFMLRX Jumbo Frame Max Length Register
Address
0x40050048
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
FML
13:0
Frame Max Length
GMAC_HRBHash Register Bottom
Address
0x40050080
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Hash Address
GMAC_HRTHash Register Top
Address
0x40050084
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Hash Address
GMAC_SAB0Specific Address 1 Bottom Register
Address
0x40050088
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Specific Address 1
GMAC_SAT0Specific Address 1 Top Register
Address
0x4005008C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
15:0
Specific Address 1
GMAC_SAB1Specific Address 1 Bottom Register
Address
0x40050090
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Specific Address 1
GMAC_SAT1Specific Address 1 Top Register
Address
0x40050094
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
15:0
Specific Address 1
GMAC_SAB2Specific Address 1 Bottom Register
Address
0x40050098
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Specific Address 1
GMAC_SAT2Specific Address 1 Top Register
Address
0x4005009C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
15:0
Specific Address 1
GMAC_SAB3Specific Address 1 Bottom Register
Address
0x400500A0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Specific Address 1
GMAC_SAT3Specific Address 1 Top Register
Address
0x400500A4
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
15:0
Specific Address 1
GMAC_TIDM1Type ID Match 1 Register
Address
0x400500A8
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
TID
15:0
Type ID Match 1
ENID1
31
Enable Copying of TID Matched Frames
GMAC_TIDM2Type ID Match 2 Register
Address
0x400500AC
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
TID
15:0
Type ID Match 2
ENID2
31
Enable Copying of TID Matched Frames
GMAC_TIDM3Type ID Match 3 Register
Address
0x400500B0
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
TID
15:0
Type ID Match 3
ENID3
31
Enable Copying of TID Matched Frames
GMAC_TIDM4Type ID Match 4 Register
Address
0x400500B4
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
TID
15:0
Type ID Match 4
ENID4
31
Enable Copying of TID Matched Frames
GMAC_WOLWake on LAN Register
Address
0x400500B8
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
MTI
19
Multicast Hash Event Enable
SA1
18
Specific Address Register 1 Event Enable
ARP
17
ARP Request IP Address
MAG
16
Magic Packet Event Enable
IP
15:0
ARP Request IP Address
GMAC_IPGSIPG Stretch Register
Address
0x400500BC
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
FL
15:0
Frame Length
GMAC_SVLANStacked VLAN Register
Address
0x400500C0
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
VLAN_TYPE
15:0
User Defined VLAN_TYPE Field
ESVLAN
31
Enable Stacked VLAN Processing Mode
GMAC_TPFCPTransmit PFC Pause Register
Address
0x400500C4
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
PQ
15:8
Pause Quantum
PEV
7:0
Priority Enable Vector
GMAC_SAMB1Specific Address 1 Mask Bottom Register
Address
0x400500C8
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
31:0
Specific Address 1 Mask
GMAC_SAMT1Specific Address 1 Mask Top Register
Address
0x400500CC
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ADDR
15:0
Specific Address 1 Mask
GMAC_NSC1588 Timer Nanosecond Comparison Register
Address
0x400500DC
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
NANOSEC
21:0
1588 Timer Nanosecond Comparison Value
GMAC_SCL1588 Timer Second Comparison Low Register
Address
0x400500E0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
SEC
31:0
1588 Timer Second Comparison Value
GMAC_SCH1588 Timer Second Comparison High Register
Address
0x400500E4
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
SEC
15:0
1588 Timer Second Comparison Value
GMAC_EFTSHPTP Event Frame Transmitted Seconds High Register
Address
0x400500E8
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RUD
15:0
Register Update
GMAC_EFRSHPTP Event Frame Received Seconds High Register
Address
0x400500EC
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RUD
15:0
Register Update
GMAC_PEFTSHPTP Peer Event Frame Transmitted Seconds High Register
Address
0x400500F0
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RUD
15:0
Register Update
GMAC_PEFRSHPTP Peer Event Frame Received Seconds High Register
Address
0x400500F4
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RUD
15:0
Register Update
GMAC_OTLOOctets Transmitted Low Register
Address
0x40050100
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
TXO
31:0
Transmitted Octets
GMAC_OTHIOctets Transmitted High Register
Address
0x40050104
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
TXO
15:0
Transmitted Octets
GMAC_FTFrames Transmitted Register
Address
0x40050108
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
FTX
31:0
Frames Transmitted without Error
GMAC_BCFTBroadcast Frames Transmitted Register
Address
0x4005010C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
BFTX
31:0
Broadcast Frames Transmitted without Error
GMAC_MFTMulticast Frames Transmitted Register
Address
0x40050110
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
MFTX
31:0
Multicast Frames Transmitted without Error
GMAC_PFTPause Frames Transmitted Register
Address
0x40050114
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
PFTX
15:0
Pause Frames Transmitted Register
GMAC_BFT6464 Byte Frames Transmitted Register
Address
0x40050118
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
64 Byte Frames Transmitted without Error
GMAC_TBFT12765 to 127 Byte Frames Transmitted Register
Address
0x4005011C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
65 to 127 Byte Frames Transmitted without Error
GMAC_TBFT255128 to 255 Byte Frames Transmitted Register
Address
0x40050120
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
128 to 255 Byte Frames Transmitted without Error
GMAC_TBFT511256 to 511 Byte Frames Transmitted Register
Address
0x40050124
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
256 to 511 Byte Frames Transmitted without Error
GMAC_TBFT1023512 to 1023 Byte Frames Transmitted Register
Address
0x40050128
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
512 to 1023 Byte Frames Transmitted without Error
GMAC_TBFT15181024 to 1518 Byte Frames Transmitted Register
Address
0x4005012C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
1024 to 1518 Byte Frames Transmitted without Error
GMAC_GTBFT1518Greater Than 1518 Byte Frames Transmitted Register
Address
0x40050130
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFTX
31:0
Greater than 1518 Byte Frames Transmitted without Error
GMAC_TURTransmit Underruns Register
Address
0x40050134
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
TXUNR
9:0
Transmit Underruns
GMAC_SCFSingle Collision Frames Register
Address
0x40050138
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
SCOL
17:0
Single Collision
GMAC_MCFMultiple Collision Frames Register
Address
0x4005013C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
MCOL
17:0
Multiple Collision
GMAC_ECExcessive Collisions Register
Address
0x40050140
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
XCOL
9:0
Excessive Collisions
GMAC_LCLate Collisions Register
Address
0x40050144
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
LCOL
9:0
Late Collisions
GMAC_DTFDeferred Transmission Frames Register
Address
0x40050148
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
DEFT
17:0
Deferred Transmission
GMAC_CSECarrier Sense Errors Register
Address
0x4005014C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
CSR
9:0
Carrier Sense Error
GMAC_ORLOOctets Received Low Received Register
Address
0x40050150
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RXO
31:0
Received Octets
GMAC_ORHIOctets Received High Received Register
Address
0x40050154
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
RXO
15:0
Received Octets
GMAC_FRFrames Received Register
Address
0x40050158
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
FRX
31:0
Frames Received without Error
GMAC_BCFRBroadcast Frames Received Register
Address
0x4005015C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
BFRX
31:0
Broadcast Frames Received without Error
GMAC_MFRMulticast Frames Received Register
Address
0x40050160
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
MFRX
31:0
Multicast Frames Received without Error
GMAC_PFRPause Frames Received Register
Address
0x40050164
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
PFRX
15:0
Pause Frames Received Register
GMAC_BFR6464 Byte Frames Received Register
Address
0x40050168
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
64 Byte Frames Received without Error
GMAC_TBFR12765 to 127 Byte Frames Received Register
Address
0x4005016C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
65 to 127 Byte Frames Received without Error
GMAC_TBFR255128 to 255 Byte Frames Received Register
Address
0x40050170
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
128 to 255 Byte Frames Received without Error
GMAC_TBFR511256 to 511 Byte Frames Received Register
Address
0x40050174
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
256 to 511 Byte Frames Received without Error
GMAC_TBFR1023512 to 1023 Byte Frames Received Register
Address
0x40050178
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
512 to 1023 Byte Frames Received without Error
GMAC_TBFR15181024 to 1518 Byte Frames Received Register
Address
0x4005017C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
1024 to 1518 Byte Frames Received without Error
GMAC_TMXBFR1519 to Maximum Byte Frames Received Register
Address
0x40050180
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
NFRX
31:0
1519 to Maximum Byte Frames Received without Error