The 10 registers of SystemControl (System Control Registers), from 0xE000ED00, with their reset value and every field. The ATSAMHA1G16AB has 990 registers in 36 peripherals, one page each.
SystemControl System Control Registers
CPUIDCPUID Base Register
Address
0xE000ED00
Reset
0x410CC601
Access
read only
Size
32-bit
5 fields
Field
Bits
What it does
VARIANT
23:20
Major revision number
ARCHITECTURE
19:16
Processor Architecture, 0xC=ARMv6-M
PARTNO
15:4
Processor Part Number, 0xC60=Cortex-M0+
REVISION
3:0
Minor revision number
IMPLEMENTER
31:24
Implementer code, ARM=0x41
ICSRInterrupt Control and State Register
Address
0xE000ED04
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
Field
Bits
What it does
PENDSVSET
28
PendSV set-pending bit
0 Write: no effect; read: PendSV exception is not pending
1 Write: changes PendSV exception state to pending; read: PendSV exception is pending
PENDSVCLR
27
PendSV clear-pending bit
0 No effect
1 Removes the pending state from the PendSV exception
PENDSTSET
26
SysTick exception set-pending bit
0 Write: no effect; read: SysTick exception is not pending
1 Write: changes SysTick exception state to pending; read: SysTick exception is pending
PENDSTCLR
25
SysTick exception clear-pending bit
0 No effect
1 Removes the pending state from the SysTick exception
ISRPREEMPT
23
Debug: Pending exception serviced on exit from debug halt
ISRPENDING
22
Debug: NVIC interrupt pending
VECTPENDING
20:12
Exception number of the highest priority pending enabled exception
VECTACTIVE
8:0
Debug: Exception number of currently executing exception, or 0 if thread mode
NMIPENDSET
31
NMI set-pending bit
0 Write: no effect; read: NMI exception is not pending
1 Write: changes NMI exception state to pending; read: NMI exception is pending
VTORVector Table Offset Register
Address
0xE000ED08
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
TBLOFF
31:7
Vector table base offset
AIRCRApplication Interrupt and Reset Control Register
Address
0xE000ED0C
Reset
0x00000000
Access
read/write
Size
32-bit
4 fields
Field
Bits
What it does
ENDIANNESS
15
Data Endianness, 0=little, 1=big
0 Little-endian
1 Big-endian
SYSRESETREQ
2
System Reset Request
0 No system reset request
1 Asserts a signal to the outer system that requests a reset
VECTCLRACTIVE
1
Debug: Clear state information
VECTKEY
31:16
Register key (0x05FA)
SCRSystem Control Register
Address
0xE000ED10
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
Field
Bits
What it does
SEVONPEND
4
Send Event on Pending bit
0 Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded
1 Enabled events and all interrupts, including disabled interrupts, can wakeup the processor
SLEEPDEEP
2
Uses Deep Sleep as low power mode
0 Sleep
1 Deep sleep
SLEEPONEXIT
1
Sleep-On-Exit when exiting Handler mode
0 O not sleep when returning to Thread mode
1 Enter sleep, or deep sleep, on return from an ISR
CCRConfiguration and Control Register
Address
0xE000ED14
Reset
0x00000204
Access
read only
Size
32-bit
2 fields
Field
Bits
What it does
STKALIGN
9
Stack 8-byte aligned on exception entry
0 4-byte aligned
1 8-byte aligned
UNALIGN_TRP
3
Unaligned accesses generates a Hard Fault
0 Do not trap unaligned halfword and word accesses
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