ATSAML10D16A WDT registers

The 8 registers of WDT (Watchdog Timer), from 0x40002000, with their reset value and every field. The ATSAML10D16A has 894 registers in 38 peripherals, one page each.

WDT Watchdog Timer

CTRLAControl

Address
0x40002000
Reset
0x00
Access
read/write
  1. 7ALWAYSON
  2. 6RUNSTDBY
  3. 5–
  4. 4–
  5. 3–
  6. 2WEN
  7. 1ENABLE
  8. 0–
4 fields
FieldBitsWhat it does
ALWAYSON7Always-On
RUNSTDBY6Run During Standby
WEN2Watchdog Timer Window Mode Enable
ENABLE1Enable

CONFIGConfiguration

Address
0x40002001
Reset
0xBB
Access
read/write
  1. 7WINDOW3
  2. 6WINDOW2
  3. 5WINDOW1
  4. 4WINDOW0
  5. 3PER3
  6. 2PER2
  7. 1PER1
  8. 0PER0
2 fields
FieldBitsWhat it does
WINDOW7:4Window Mode Time-Out Period
  • 0 8 clock cycles
  • 1 16 clock cycles
  • 2 32 clock cycles
  • 3 64 clock cycles
  • 4 128 clock cycles
  • 5 256 clock cycles
  • 6 512 clock cycles
  • 7 1024 clock cycles
  • 8 2048 clock cycles
  • 9 4096 clock cycles
  • 10 8192 clock cycles
  • 11 16384 clock cycles
PER3:0Time-Out Period
  • 0 8 clock cycles
  • 1 16 clock cycles
  • 2 32 clock cycles
  • 3 64 clock cycles
  • 4 128 clock cycles
  • 5 256 clock cycles
  • 6 512 clock cycles
  • 7 1024 clock cycles
  • 8 2048 clock cycles
  • 9 4096 clock cycles
  • 10 8192 clock cycles
  • 11 16384 clock cycles

EWCTRLEarly Warning Interrupt Control

Address
0x40002002
Reset
0x0B
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3EWOFFSET3
  6. 2EWOFFSET2
  7. 1EWOFFSET1
  8. 0EWOFFSET0
1 field
FieldBitsWhat it does
EWOFFSET3:0Early Warning Interrupt Time Offset
  • 0 8 clock cycles
  • 1 16 clock cycles
  • 2 32 clock cycles
  • 3 64 clock cycles
  • 4 128 clock cycles
  • 5 256 clock cycles
  • 6 512 clock cycles
  • 7 1024 clock cycles
  • 8 2048 clock cycles
  • 9 4096 clock cycles
  • 10 8192 clock cycles

INTENCLRInterrupt Enable Clear

Address
0x40002004
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0EW
1 field
FieldBitsWhat it does
EW0Early Warning Interrupt Enable

INTENSETInterrupt Enable Set

Address
0x40002005
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0EW
1 field
FieldBitsWhat it does
EW0Early Warning Interrupt Enable

INTFLAGInterrupt Flag Status and Clear

Address
0x40002006
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0EW
1 field
FieldBitsWhat it does
EW0Early Warning

SYNCBUSYSynchronization Busy

Address
0x40002008
Reset
0x00000000
Access
read only
Size
32-bit
5 fields
FieldBitsWhat it does
CLEAR5Clear Synchronization Busy
ALWAYSON4Always-On Synchronization Busy
RUNSTDBY3Run During Standby Synchronization Busy
WEN2Window Enable Synchronization Busy
ENABLE1Enable Synchronization Busy

CLEARClear

Address
0x4000200C
Reset
0x00
Access
write only
  1. 7CLEAR7
  2. 6CLEAR6
  3. 5CLEAR5
  4. 4CLEAR4
  5. 3CLEAR3
  6. 2CLEAR2
  7. 1CLEAR1
  8. 0CLEAR0
1 field
FieldBitsWhat it does
CLEAR7:0Watchdog Clear
  • 165 Clear Key