ATSAML10E14A DMAC registers The 23 registers of DMAC (Direct Memory Access Controller), from 0x41006000, with their reset value and every field. The ATSAML10E14A has 962 registers in 39 peripherals, one page each.
DMAC Direct Memory Access Controller CTRLControl
Address 0x41006000
Reset 0x0000
Access read/write
Size 16-bit 7 fields
Field Bits What it does LVLEN3 11 Priority Level 3 Enable LVLEN2 10 Priority Level 2 Enable LVLEN1 9 Priority Level 1 Enable LVLEN0 8 Priority Level 0 Enable CRCENABLE 2 CRC Enable DMAENABLE 1 DMA Enable SWRST 0 Software Reset
CRCCTRLCRC Control
Address 0x41006002
Reset 0x0000
Access read/write
Size 16-bit 3 fields
Field Bits What it does CRCSRC 13:8 CRC Input Source0 No action1 I/O interface32 DMA Channel 033 DMA Channel 134 DMA Channel 235 DMA Channel 336 DMA Channel 437 DMA Channel 538 DMA Channel 639 DMA Channel 7 CRCPOLY 3:2 CRC Polynomial Type0 CRC-16 (CRC-CCITT)1 CRC32 (IEEE 802.3) CRCBEATSIZE 1:0 CRC Beat Size0 8-bit bus transfer1 16-bit bus transfer2 32-bit bus transfer
CRCDATAINCRC Data Input
Address 0x41006004
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does CRCDATAIN 31:0 CRC Data Input
CRCCHKSUMCRC Checksum
Address 0x41006008
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does CRCCHKSUM 31:0 CRC Checksum
CRCSTATUSCRC Status
Address 0x4100600C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 CRCZERO 0 CRCBUSY 2 fields
Field Bits What it does CRCZERO 1 CRC Zero CRCBUSY 0 CRC Module Busy
DBGCTRLDebug Control
Address 0x4100600D
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 DBGRUN 1 field
Field Bits What it does DBGRUN 0 Debug Run
QOSCTRLQOS Control
Address 0x4100600E
Reset 0x2A
Access read/write 7 – 6 – 5 DQOS1 4 DQOS0 3 FQOS1 2 FQOS0 1 WRBQOS1 0 WRBQOS0 3 fields
Field Bits What it does DQOS 5:4 Data Transfer Quality of Service0 Background (no sensitive operation)1 Sensitive Bandwidth2 Sensitive Latency3 Critical Latency FQOS 3:2 Fetch Quality of Service0 Background (no sensitive operation)1 Sensitive Bandwidth2 Sensitive Latency3 Critical Latency WRBQOS 1:0 Write-Back Quality of Service0 Background (no sensitive operation)1 Sensitive Bandwidth2 Sensitive Latency3 Critical Latency
SWTRIGCTRLSoftware Trigger Control
Address 0x41006010
Reset 0x00000000
Access read/write
Size 32-bit 8 fields
Field Bits What it does SWTRIG7 7 Channel 7 Software Trigger SWTRIG6 6 Channel 6 Software Trigger SWTRIG5 5 Channel 5 Software Trigger SWTRIG4 4 Channel 4 Software Trigger SWTRIG3 3 Channel 3 Software Trigger SWTRIG2 2 Channel 2 Software Trigger SWTRIG1 1 Channel 1 Software Trigger SWTRIG0 0 Channel 0 Software Trigger
PRICTRL0Priority Control 0
Address 0x41006014
Reset 0x00000000
Access read/write
Size 32-bit 8 fields
Field Bits What it does LVLPRI3 26:24 Level 3 Channel Priority Number RRLVLEN2 23 Level 2 Round-Robin Scheduling Enable LVLPRI2 18:16 Level 2 Channel Priority Number RRLVLEN1 15 Level 1 Round-Robin Scheduling Enable LVLPRI1 10:8 Level 1 Channel Priority Number RRLVLEN0 7 Level 0 Round-Robin Scheduling Enable LVLPRI0 2:0 Level 0 Channel Priority Number RRLVLEN3 31 Level 3 Round-Robin Scheduling Enable
INTPENDInterrupt Pending
Address 0x41006020
Reset 0x0000
Access read/write
Size 16-bit 7 fields
Field Bits What it does PEND 15 Pending BUSY 14 Busy FERR 13 Fetch Error SUSP 10 Channel Suspend TCMPL 9 Transfer Complete TERR 8 Transfer Error ID 2:0 Channel ID
INTSTATUSInterrupt Status
Address 0x41006024
Reset 0x00000000
Access read only
Size 32-bit 8 fields
Field Bits What it does CHINT7 7 Channel 7 Pending Interrupt CHINT6 6 Channel 6 Pending Interrupt CHINT5 5 Channel 5 Pending Interrupt CHINT4 4 Channel 4 Pending Interrupt CHINT3 3 Channel 3 Pending Interrupt CHINT2 2 Channel 2 Pending Interrupt CHINT1 1 Channel 1 Pending Interrupt CHINT0 0 Channel 0 Pending Interrupt
BUSYCHBusy Channels
Address 0x41006028
Reset 0x00000000
Access read only
Size 32-bit 8 fields
Field Bits What it does BUSYCH7 7 Busy Channel 7 BUSYCH6 6 Busy Channel 6 BUSYCH5 5 Busy Channel 5 BUSYCH4 4 Busy Channel 4 BUSYCH3 3 Busy Channel 3 BUSYCH2 2 Busy Channel 2 BUSYCH1 1 Busy Channel 1 BUSYCH0 0 Busy Channel 0
PENDCHPending Channels
Address 0x4100602C
Reset 0x00000000
Access read only
Size 32-bit 8 fields
Field Bits What it does PENDCH7 7 Pending Channel 7 PENDCH6 6 Pending Channel 6 PENDCH5 5 Pending Channel 5 PENDCH4 4 Pending Channel 4 PENDCH3 3 Pending Channel 3 PENDCH2 2 Pending Channel 2 PENDCH1 1 Pending Channel 1 PENDCH0 0 Pending Channel 0
ACTIVEActive Channel and Levels
Address 0x41006030
Reset 0x00000000
Access read only
Size 32-bit 7 fields
Field Bits What it does ABUSY 15 Active Channel Busy ID 12:8 Active Channel ID LVLEX3 3 Level 3 Channel Trigger Request Executing LVLEX2 2 Level 2 Channel Trigger Request Executing LVLEX1 1 Level 1 Channel Trigger Request Executing LVLEX0 0 Level 0 Channel Trigger Request Executing BTCNT 31:16 Active Channel Block Transfer Count
BASEADDRDescriptor Memory Section Base Address
Address 0x41006034
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does BASEADDR 31:0 Descriptor Memory Base Address
WRBADDRWrite-Back Memory Section Base Address
Address 0x41006038
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does WRBADDR 31:0 Write-Back Memory Base Address
CHIDChannel ID
Address 0x4100603F
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 ID2 1 ID1 0 ID0 1 field
Field Bits What it does ID 2:0 Channel ID
CHCTRLAChannel Control A
Address 0x41006040
Reset 0x00
Access read/write 7 – 6 RUNSTDBY 5 – 4 – 3 – 2 – 1 ENABLE 0 SWRST 3 fields
Field Bits What it does RUNSTDBY 6 Channel run in standby ENABLE 1 Channel Enable SWRST 0 Channel Software Reset
CHCTRLBChannel Control B
Address 0x41006044
Reset 0x00000000
Access read/write
Size 32-bit 7 fields
Field Bits What it does CMD 25:24 Software Command0 No action1 Channel suspend operation2 Channel resume operation TRIGACT 23:22 Trigger Action0 One trigger required for each block transfer2 One trigger required for each beat transfer3 One trigger required for each transaction TRIGSRC 12:8 Trigger Source0 Only software/event triggers1 RTC Timestamp Trigger2 ID for DCC0 register3 ID for DCC1 register4 SERCOM0 RX Trigger5 SERCOM0 TX Trigger6 SERCOM1 RX Trigger7 SERCOM1 TX Trigger8 SERCOM2 RX Trigger9 SERCOM2 TX Trigger10 TC0 Overflow Trigger11 TC0 Match/Compare 0 Trigger12 TC0 Match/Compare 1 Trigger13 TC1 Overflow Trigger14 TC1 Match/Compare 0 Trigger15 TC1 Match/Compare 1 Trigger16 TC2 Overflow Trigger17 TC2 Match/Compare 0 Trigger18 TC2 Match/Compare 1 Trigger19 ADC Result Ready Trigger20 DAC Empty Trigger21 PTC End of Conversion Trigger22 PTC Sequence Trigger23 PTC Window Compare Trigger LVL 6:5 Channel Arbitration Level EVOE 4 Channel Event Output Enable EVIE 3 Channel Event Input Enable EVACT 2:0 Event Input Action0 No action1 Transfer and periodic transfer trigger2 Conditional transfer trigger3 Conditional block transfer4 Channel suspend operation5 Channel resume operation6 Skip next block suspend action
CHINTENCLRChannel Interrupt Enable Clear
Address 0x4100604C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SUSP 1 TCMPL 0 TERR 3 fields
Field Bits What it does SUSP 2 Channel Suspend Interrupt Enable TCMPL 1 Channel Transfer Complete Interrupt Enable TERR 0 Channel Transfer Error Interrupt Enable
CHINTENSETChannel Interrupt Enable Set
Address 0x4100604D
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SUSP 1 TCMPL 0 TERR 3 fields
Field Bits What it does SUSP 2 Channel Suspend Interrupt Enable TCMPL 1 Channel Transfer Complete Interrupt Enable TERR 0 Channel Transfer Error Interrupt Enable
CHINTFLAGChannel Interrupt Flag Status and Clear
Address 0x4100604E
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SUSP 1 TCMPL 0 TERR 3 fields
Field Bits What it does SUSP 2 Channel Suspend TCMPL 1 Channel Transfer Complete TERR 0 Channel Transfer Error
CHSTATUSChannel Status
Address 0x4100604F
Reset 0x00
Access read only 7 – 6 – 5 – 4 – 3 – 2 FERR 1 BUSY 0 PEND 3 fields
Field Bits What it does FERR 2 Channel Fetch Error BUSY 1 Channel Busy PEND 0 Channel Pending
BETA