ATSAML21G18A CCL registers

The 7 registers of CCL (Configurable Custom Logic), from 0x43001C00, with their reset value and every field. The ATSAML21G18A has 1137 registers in 40 peripherals, one page each.

CCL Configurable Custom Logic

CTRLControl

Address
0x43001C00
Reset
0x00
Access
read/write
  1. 7–
  2. 6RUNSTDBY
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1ENABLE
  8. 0SWRST
3 fields
FieldBitsWhat it does
RUNSTDBY6Run during Standby
ENABLE1Enable
SWRST0Software Reset

SEQCTRL0SEQ Control x

Address
0x43001C04
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3SEQSEL3
  6. 2SEQSEL2
  7. 1SEQSEL1
  8. 0SEQSEL0
1 field
FieldBitsWhat it does
SEQSEL3:0Sequential Selection
  • 0 Sequential logic is disabled
  • 1 D flip flop
  • 2 JK flip flop
  • 3 D latch
  • 4 RS latch

SEQCTRL1SEQ Control x

Address
0x43001C05
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3SEQSEL3
  6. 2SEQSEL2
  7. 1SEQSEL1
  8. 0SEQSEL0
1 field
FieldBitsWhat it does
SEQSEL3:0Sequential Selection
  • 0 Sequential logic is disabled
  • 1 D flip flop
  • 2 JK flip flop
  • 3 D latch
  • 4 RS latch

LUTCTRL0LUT Control x

Address
0x43001C08
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
LUTEO22Event Output Enable
LUTEI21Event Input Enable
INVEI20Input Event Invert
INSEL219:16Input Selection 2
INSEL115:12Input Selection 1
INSEL011:8Input Selection 0
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event in put source
  • 4 I/O pin input source
  • 5 AC input source
  • 6 TC input source
  • 7 Alternate TC input source
  • 8 TCC input source
  • 9 SERCOM inout source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
ENABLE1LUT Enable
TRUTH31:24Truth Value

LUTCTRL1LUT Control x

Address
0x43001C0C
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
LUTEO22Event Output Enable
LUTEI21Event Input Enable
INVEI20Input Event Invert
INSEL219:16Input Selection 2
INSEL115:12Input Selection 1
INSEL011:8Input Selection 0
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event in put source
  • 4 I/O pin input source
  • 5 AC input source
  • 6 TC input source
  • 7 Alternate TC input source
  • 8 TCC input source
  • 9 SERCOM inout source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
ENABLE1LUT Enable
TRUTH31:24Truth Value

LUTCTRL2LUT Control x

Address
0x43001C10
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
LUTEO22Event Output Enable
LUTEI21Event Input Enable
INVEI20Input Event Invert
INSEL219:16Input Selection 2
INSEL115:12Input Selection 1
INSEL011:8Input Selection 0
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event in put source
  • 4 I/O pin input source
  • 5 AC input source
  • 6 TC input source
  • 7 Alternate TC input source
  • 8 TCC input source
  • 9 SERCOM inout source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
ENABLE1LUT Enable
TRUTH31:24Truth Value

LUTCTRL3LUT Control x

Address
0x43001C14
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
LUTEO22Event Output Enable
LUTEI21Event Input Enable
INVEI20Input Event Invert
INSEL219:16Input Selection 2
INSEL115:12Input Selection 1
INSEL011:8Input Selection 0
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event in put source
  • 4 I/O pin input source
  • 5 AC input source
  • 6 TC input source
  • 7 Alternate TC input source
  • 8 TCC input source
  • 9 SERCOM inout source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
ENABLE1LUT Enable
TRUTH31:24Truth Value