ATSAMR21G18A GCLK registers

The 5 registers of GCLK (Generic Clock Generator), from 0x40000C00, with their reset value and every field. The ATSAMR21G18A has 1140 registers in 35 peripherals, one page each.

GCLK Generic Clock Generator

CTRLControl

Address
0x40000C00
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SWRST
1 field
FieldBitsWhat it does
SWRST0Software Reset

STATUSStatus

Address
0x40000C01
Reset
0x00
Access
read only
  1. 7SYNCBUSY
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–
1 field
FieldBitsWhat it does
SYNCBUSY7Synchronization Busy Status

CLKCTRLGeneric Clock Control

Address
0x40000C02
Reset
0x0000
Access
read/write
Size
16-bit
4 fields
FieldBitsWhat it does
WRTLOCK15Write Lock
CLKEN14Clock Enable
GEN11:8Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4
  • 5 Generic clock generator 5
  • 6 Generic clock generator 6
  • 7 Generic clock generator 7
  • 8 Generic clock generator 8
ID5:0Generic Clock Selection ID
  • 0 DFLL48
  • 1 FDPLL
  • 2 FDPLL32K
  • 3 WDT
  • 4 RTC
  • 5 EIC
  • 6 USB
  • 7 EVSYS_0
  • 8 EVSYS_1
  • 9 EVSYS_2
  • 10 EVSYS_3
  • 11 EVSYS_4
  • 12 EVSYS_5
  • 13 EVSYS_6
  • 14 EVSYS_7
  • 15 EVSYS_8
  • 16 EVSYS_9
  • 17 EVSYS_10
  • 18 EVSYS_11
  • 19 SERCOMX_SLOW
  • 20 SERCOM0_CORE
  • 21 SERCOM1_CORE
  • 22 SERCOM2_CORE
  • 23 SERCOM3_CORE
  • 24 SERCOM4_CORE
  • 25 SERCOM5_CORE
  • 26 TCC0_TCC1
  • 27 TCC2_TC3
  • 28 TC4_TC5
  • 30 ADC
  • 31 AC_DIG
  • 32 AC_ANA
  • 35 I2S_0
  • 36 I2S_1

GENCTRLGeneric Clock Generator Control

Address
0x40000C04
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY21Run in Standby
DIVSEL20Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE19Output Enable
OOV18Output Off Value
IDC17Improve Duty Cycle
GENEN16Generic Clock Generator Enable
SRC12:8Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 OSC32K oscillator output
  • 5 XOSC32K oscillator output
  • 6 OSC8M oscillator output
  • 7 DFLL48M output
  • 8 DPLL96M output
ID3:0Generic Clock Generator Selection

GENDIVGeneric Clock Generator Division

Address
0x40000C08
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
DIV23:8Division Factor
ID3:0Generic Clock Generator Selection