CTRLAControl A
- Address
0x41005000- Reset
0x00- Access
- read/write
- 7MODE
- 6–
- 5–
- 4–
- 3–
- 2RUNSTDBY
- 1ENABLE
- 0SWRST
4 fields
| Field | Bits | What it does |
|---|---|---|
| MODE | 7 | Operating Mode
|
| RUNSTDBY | 2 | Run in Standby Mode |
| ENABLE | 1 | Enable |
| SWRST | 0 | Software Reset |
The 143 registers of USB (Universal Serial Bus), from 0x41005000, with their reset value and every field. The ATSAMR21G18A has 1140 registers in 35 peripherals, one page each.
0x410050000x00| Field | Bits | What it does |
|---|---|---|
| MODE | 7 | Operating Mode
|
| RUNSTDBY | 2 | Run in Standby Mode |
| ENABLE | 1 | Enable |
| SWRST | 0 | Software Reset |
0x410050020x00| Field | Bits | What it does |
|---|---|---|
| ENABLE | 1 | Enable Synchronization Busy |
| SWRST | 0 | Software Reset Synchronization Busy |
0x410050030x05| Field | Bits | What it does |
|---|---|---|
| DQOS | 3:2 | Data Quality of Service
|
| CQOS | 1:0 | Configuration Quality of Service
|
0x410050080x0001| Field | Bits | What it does |
|---|---|---|
| LPMHDSK | 11:10 | Link Power Management Handshake
|
| GNAK | 9 | Global NAK |
| OPMODE2 | 8 | Specific Operational Mode |
| TSTPCKT | 7 | Test packet mode |
| TSTK | 6 | Test mode K |
| TSTJ | 5 | Test mode J |
| NREPLY | 4 | No Reply |
| SPDCONF | 3:2 | Speed Configuration
|
| UPRSM | 1 | Upstream Resume |
| DETACH | 0 | Detach |
0x410050080x0000| Field | Bits | What it does |
|---|---|---|
| L1RESUME | 11 | Send L1 Resume |
| VBUSOK | 10 | VBUS is OK |
| BUSRESET | 9 | Send USB Reset |
| SOFE | 8 | Start of Frame Generation Enable |
| TSTK | 6 | Test mode K |
| TSTJ | 5 | Test mode J |
| SPDCONF | 3:2 | Speed Configuration for Host
|
| RESUME | 1 | Send USB Resume |
0x4100500A0x00| Field | Bits | What it does |
|---|---|---|
| ADDEN | 7 | Device Address Enable |
| DADD | 6:0 | Device Address |
0x4100500A0x00| Field | Bits | What it does |
|---|---|---|
| FLENCE | 7 | Frame Length Control Enable |
| FLENC | 3:0 | Frame Length Control |
0x4100500C0x40| Field | Bits | What it does |
|---|---|---|
| LINESTATE | 7:6 | USB Line State Status
|
| SPEED | 3:2 | Speed Status
|
0x4100500C0x00| Field | Bits | What it does |
|---|---|---|
| LINESTATE | 7:6 | USB Line State Status |
| SPEED | 3:2 | Speed Status |
0x4100500D0x01| Field | Bits | What it does |
|---|---|---|
| FSMSTATE | 6:0 | Fine State Machine Status
|
0x410050100x0000| Field | Bits | What it does |
|---|---|---|
| FNCERR | 15 | Frame Number CRC Error |
| FNUM | 13:3 | Frame Number |
| MFNUM | 2:0 | Micro Frame Number |
0x410050100x0000| Field | Bits | What it does |
|---|---|---|
| FNUM | 13:3 | Frame Number |
| MFNUM | 2:0 | Micro Frame Number |
0x410050120x00| Field | Bits | What it does |
|---|---|---|
| FLENHIGH | 7:0 | Frame Length |
0x410050140x0000| Field | Bits | What it does |
|---|---|---|
| LPMSUSP | 9 | Link Power Management Suspend Interrupt Enable |
| LPMNYET | 8 | Link Power Management Not Yet Interrupt Enable |
| RAMACER | 7 | Ram Access Interrupt Enable |
| UPRSM | 6 | Upstream Resume Interrupt Enable |
| EORSM | 5 | End Of Resume Interrupt Enable |
| WAKEUP | 4 | Wake Up Interrupt Enable |
| EORST | 3 | End of Reset Interrupt Enable |
| SOF | 2 | Start Of Frame Interrupt Enable |
| MSOF | 1 | Micro Start of Frame Interrupt Enable in High Speed Mode |
| SUSPEND | 0 | Suspend Interrupt Enable |
0x410050140x0000| Field | Bits | What it does |
|---|---|---|
| DDISC | 9 | Device Disconnection Interrupt Disable |
| DCONN | 8 | Device Connection Interrupt Disable |
| RAMACER | 7 | Ram Access Interrupt Disable |
| UPRSM | 6 | Upstream Resume from Device Interrupt Disable |
| DNRSM | 5 | DownStream to Device Interrupt Disable |
| WAKEUP | 4 | Wake Up Interrupt Disable |
| RST | 3 | BUS Reset Interrupt Disable |
| HSOF | 2 | Host Start Of Frame Interrupt Disable |
0x410050180x0000| Field | Bits | What it does |
|---|---|---|
| LPMSUSP | 9 | Link Power Management Suspend Interrupt Enable |
| LPMNYET | 8 | Link Power Management Not Yet Interrupt Enable |
| RAMACER | 7 | Ram Access Interrupt Enable |
| UPRSM | 6 | Upstream Resume Interrupt Enable |
| EORSM | 5 | End Of Resume Interrupt Enable |
| WAKEUP | 4 | Wake Up Interrupt Enable |
| EORST | 3 | End of Reset Interrupt Enable |
| SOF | 2 | Start Of Frame Interrupt Enable |
| MSOF | 1 | Micro Start of Frame Interrupt Enable in High Speed Mode |
| SUSPEND | 0 | Suspend Interrupt Enable |
0x410050180x0000| Field | Bits | What it does |
|---|---|---|
| DDISC | 9 | Device Disconnection Interrupt Enable |
| DCONN | 8 | Link Power Management Interrupt Enable |
| RAMACER | 7 | Ram Access Interrupt Enable |
| UPRSM | 6 | Upstream Resume fromthe device Interrupt Enable |
| DNRSM | 5 | DownStream to the Device Interrupt Enable |
| WAKEUP | 4 | Wake Up Interrupt Enable |
| RST | 3 | Bus Reset Interrupt Enable |
| HSOF | 2 | Host Start Of Frame Interrupt Enable |
0x4100501C0x0000| Field | Bits | What it does |
|---|---|---|
| LPMSUSP | 9 | Link Power Management Suspend |
| LPMNYET | 8 | Link Power Management Not Yet |
| RAMACER | 7 | Ram Access |
| UPRSM | 6 | Upstream Resume |
| EORSM | 5 | End Of Resume |
| WAKEUP | 4 | Wake Up |
| EORST | 3 | End of Reset |
| SOF | 2 | Start Of Frame |
| MSOF | 1 | Micro Start of Frame in High Speed Mode |
| SUSPEND | 0 | Suspend |
0x4100501C0x0000| Field | Bits | What it does |
|---|---|---|
| DDISC | 9 | Device Disconnection |
| DCONN | 8 | Device Connection |
| RAMACER | 7 | Ram Access |
| UPRSM | 6 | Upstream Resume from the Device |
| DNRSM | 5 | Downstream |
| WAKEUP | 4 | Wake Up |
| RST | 3 | Bus Reset |
| HSOF | 2 | Host Start Of Frame |
0x410050200x0000| Field | Bits | What it does |
|---|---|---|
| EPINT7 | 7 | End Point 7 Interrupt |
| EPINT6 | 6 | End Point 6 Interrupt |
| EPINT5 | 5 | End Point 5 Interrupt |
| EPINT4 | 4 | End Point 4 Interrupt |
| EPINT3 | 3 | End Point 3 Interrupt |
| EPINT2 | 2 | End Point 2 Interrupt |
| EPINT1 | 1 | End Point 1 Interrupt |
| EPINT0 | 0 | End Point 0 Interrupt |
0x410050200x0000| Field | Bits | What it does |
|---|---|---|
| EPINT7 | 7 | Pipe 7 Interrupt |
| EPINT6 | 6 | Pipe 6 Interrupt |
| EPINT5 | 5 | Pipe 5 Interrupt |
| EPINT4 | 4 | Pipe 4 Interrupt |
| EPINT3 | 3 | Pipe 3 Interrupt |
| EPINT2 | 2 | Pipe 2 Interrupt |
| EPINT1 | 1 | Pipe 1 Interrupt |
| EPINT0 | 0 | Pipe 0 Interrupt |
0x410050240x00000000| Field | Bits | What it does |
|---|---|---|
| DESCADD | 31:0 | Descriptor Address Value |
0x410050280x0000| Field | Bits | What it does |
|---|---|---|
| TRIM | 14:12 | USB Pad Trim calibration |
| TRANSN | 10:6 | USB Pad Transn calibration |
| TRANSP | 4:0 | USB Pad Transp calibration |
0x410051000x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051000x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051030x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051040x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051040x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051050x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051050x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051060x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051060x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051070x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051070x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051080x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051080x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051090x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051090x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051200x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051200x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051230x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051240x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051240x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051250x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051250x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051260x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051260x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051270x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051270x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051280x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051280x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051290x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051290x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051400x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051400x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051430x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051440x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051440x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051450x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051450x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051460x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051460x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051470x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051470x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051480x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051480x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051490x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051490x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051600x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051600x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051630x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051640x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051640x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051650x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051650x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051660x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051660x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051670x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051670x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051680x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051680x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051690x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051690x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051800x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051800x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051830x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051840x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051840x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051850x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051850x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051860x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051860x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051870x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051870x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051880x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051880x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051890x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051890x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051A00x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051A00x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051A30x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051A40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051A40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051A50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051A50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051A60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051A60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051A70x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051A70x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051A80x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051A80x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051A90x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051A90x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051C00x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051C00x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051C30x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051C40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051C40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051C50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051C50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051C60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051C60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051C70x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051C70x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051C80x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051C80x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051C90x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051C90x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051E00x00| Field | Bits | What it does |
|---|---|---|
| NYETDIS | 7 | NYET Token Disable |
| EPTYPE1 | 6:4 | End Point Type1 |
| EPTYPE0 | 2:0 | End Point Type0 |
0x410051E00x00| Field | Bits | What it does |
|---|---|---|
| PTYPE | 5:3 | Pipe Type |
| BK | 2 | Pipe Bank |
| PTOKEN | 1:0 | Pipe Token |
0x410051E30x00| Field | Bits | What it does |
|---|---|---|
| BITINTERVAL | 7:0 | Bit Interval |
0x410051E40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| STALLRQ1 | 5 | Stall 1 Request Clear |
| STALLRQ0 | 4 | Stall 0 Request Clear |
| CURBK | 2 | Curren Bank Clear |
| DTGLIN | 1 | Data Toggle IN Clear |
| DTGLOUT | 0 | Data Toggle OUT Clear |
0x410051E40x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Clear |
| BK0RDY | 6 | Bank 0 Ready Clear |
| PFREEZE | 4 | Pipe Freeze Clear |
| CURBK | 2 | Curren Bank clear |
| DTGL | 0 | Data Toggle clear |
0x410051E50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| STALLRQ1 | 5 | Stall 1 Request Set |
| STALLRQ0 | 4 | Stall 0 Request Set |
| CURBK | 2 | Current Bank Set |
| DTGLIN | 1 | Data Toggle IN Set |
| DTGLOUT | 0 | Data Toggle OUT Set |
0x410051E50x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 Ready Set |
| BK0RDY | 6 | Bank 0 Ready Set |
| PFREEZE | 4 | Pipe Freeze Set |
| CURBK | 2 | Current Bank Set |
| DTGL | 0 | Data Toggle Set |
0x410051E60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| STALLRQ1 | 5 | Stall 1 Request |
| STALLRQ0 | 4 | Stall 0 Request |
| CURBK | 2 | Current Bank |
| DTGLIN | 1 | Data Toggle In |
| DTGLOUT | 0 | Data Toggle Out |
0x410051E60x00| Field | Bits | What it does |
|---|---|---|
| BK1RDY | 7 | Bank 1 ready |
| BK0RDY | 6 | Bank 0 ready |
| PFREEZE | 4 | Pipe Freeze |
| CURBK | 2 | Current Bank |
| DTGL | 0 | Data Toggle |
0x410051E70x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out |
| STALL0 | 5 | Stall 0 In/out |
| RXSTP | 4 | Received Setup |
| TRFAIL1 | 3 | Error Flow 1 |
| TRFAIL0 | 2 | Error Flow 0 |
| TRCPT1 | 1 | Transfer Complete 1 |
| TRCPT0 | 0 | Transfer Complete 0 |
0x410051E70x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Flag |
| TXSTP | 4 | Transmit Setup Interrupt Flag |
| PERR | 3 | Pipe Error Interrupt Flag |
| TRFAIL | 2 | Error Flow Interrupt Flag |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Flag |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Flag |
0x410051E80x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/Out Interrupt Disable |
| STALL0 | 5 | Stall 0 In/Out Interrupt Disable |
| RXSTP | 4 | Received Setup Interrupt Disable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Disable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Disable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Disable |
0x410051E80x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Inetrrupt Disable |
| TXSTP | 4 | Transmit Setup Interrupt Disable |
| PERR | 3 | Pipe Error Interrupt Disable |
| TRFAIL | 2 | Error Flow Interrupt Disable |
| TRCPT1 | 1 | Transfer Complete 1 Disable |
| TRCPT0 | 0 | Transfer Complete 0 Disable |
0x410051E90x00| Field | Bits | What it does |
|---|---|---|
| STALL1 | 6 | Stall 1 In/out Interrupt enable |
| STALL0 | 5 | Stall 0 In/out Interrupt enable |
| RXSTP | 4 | Received Setup Interrupt Enable |
| TRFAIL1 | 3 | Error Flow 1 Interrupt Enable |
| TRFAIL0 | 2 | Error Flow 0 Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |
0x410051E90x00| Field | Bits | What it does |
|---|---|---|
| STALL | 5 | Stall Interrupt Enable |
| TXSTP | 4 | Transmit Setup Interrupt Enable |
| PERR | 3 | Pipe Error Interrupt Enable |
| TRFAIL | 2 | Error Flow Interrupt Enable |
| TRCPT1 | 1 | Transfer Complete 1 Interrupt Enable |
| TRCPT0 | 0 | Transfer Complete 0 Interrupt Enable |