ATSAMV71J20B DACC registers

The 15 registers of DACC (Digital-to-Analog Converter Controller), from 0x40040000, with their reset value and every field. The ATSAMV71J20B has 2417 registers in 55 peripherals, one page each.

DACC Digital-to-Analog Converter Controller

DACC_CRControl Register

Address
0x40040000
Reset
0x00000000
Access
write only
Size
32-bit
1 field
FieldBitsWhat it does
SWRST0Software Reset

DACC_MRMode Register

Address
0x40040004
Reset
0x00000000
Access
read/write
Size
32-bit
6 fields
FieldBitsWhat it does
PRESCALER27:24Peripheral Clock to DAC Clock Ratio
DIFF23Differential Mode
  • 0 DAC0 and DAC1 are single-ended outputs.
  • 1 DACP and DACN are differential outputs. The differential level is configured by the channel 0 value.
ZERO5Must always be written to 0.
WORD4Word Transfer Mode
  • 0 One data to convert is written to the FIFO per access to DACC.
  • 1 Two data to convert are written to the FIFO per access to DACC (reduces the number of requests to DMA and the number of system bus accesses).
MAXS11Max Speed Mode for Channel 1
  • 0 External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)
  • 1 Max speed mode enabled.
MAXS00Max Speed Mode for Channel 0
  • 0 External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.)
  • 1 Max speed mode enabled.

DACC_TRIGRTrigger Register

Address
0x40040008
Reset
0x00000000
Access
read/write
Size
32-bit
6 fields
FieldBitsWhat it does
OSR122:20Over Sampling Ratio of Channel 1
  • 0 OSR = 1
  • 1 OSR = 2
  • 2 OSR = 4
  • 3 OSR = 8
  • 4 OSR = 16
  • 5 OSR = 32
OSR018:16Over Sampling Ratio of Channel 0
  • 0 OSR = 1
  • 1 OSR = 2
  • 2 OSR = 4
  • 3 OSR = 8
  • 4 OSR = 16
  • 5 OSR = 32
TRGSEL110:8Trigger Selection of Channel 1
  • 0 DAC External Trigger Input (DATRG)
  • 1 TC0 Channel 0 Output (TIOA0)
  • 2 TC0 Channel 1 Output (TIOA1)
  • 3 TC0 Channel 2 Output (TIOA2)
  • 4 PWM0 Event Line 0
  • 5 PWM0 Event Line 1
  • 6 PWM1 Event Line 0
  • 7 PWM1 Event Line 1
TRGSEL06:4Trigger Selection of Channel 0
  • 0 DAC External Trigger Input (DATRG)
  • 1 TC0 Channel 0 Output (TIOA0)
  • 2 TC0 Channel 1 Output (TIOA1)
  • 3 TC0 Channel 2 Output (TIOA2)
  • 4 PWM0 Event Line 0
  • 5 PWM0 Event Line 1
  • 6 PWM1 Event Line 0
  • 7 PWM1 Event Line 1
TRGEN11Trigger Enable of Channel 1
  • 0 External trigger mode disabled. DACC is in Free-running mode or Max speed mode.
  • 1 External trigger mode enabled.
TRGEN00Trigger Enable of Channel 0
  • 0 External trigger mode disabled. DACC is in Free-running mode or Max speed mode.
  • 1 External trigger mode enabled.

DACC_CHERChannel Enable Register

Address
0x40040010
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
FieldBitsWhat it does
CH11Channel 1 Enable
CH00Channel 0 Enable

DACC_CHDRChannel Disable Register

Address
0x40040014
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
FieldBitsWhat it does
CH11Channel 1 Disable
CH00Channel 0 Disable

DACC_CHSRChannel Status Register

Address
0x40040018
Reset
0x00000000
Access
read only
Size
32-bit
4 fields
FieldBitsWhat it does
DACRDY19DAC Ready Flag
DACRDY08DAC Ready Flag
CH11Channel 1 Status
CH00Channel 0 Status

DACC_CDR0Conversion Data Register 0

Address
0x4004001C
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
FieldBitsWhat it does
DATA015:0Data to Convert for channel 0
DATA131:16Data to Convert for channel 1

DACC_CDR1Conversion Data Register 0

Address
0x40040020
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
FieldBitsWhat it does
DATA015:0Data to Convert for channel 0
DATA131:16Data to Convert for channel 1

DACC_IERInterrupt Enable Register

Address
0x40040024
Reset
0x00000000
Access
write only
Size
32-bit
4 fields
FieldBitsWhat it does
EOC15End of Conversion Interrupt Enable of channel 1
EOC04End of Conversion Interrupt Enable of channel 0
TXRDY11Transmit Ready Interrupt Enable of channel 1
TXRDY00Transmit Ready Interrupt Enable of channel 0

DACC_IDRInterrupt Disable Register

Address
0x40040028
Reset
0x00000000
Access
write only
Size
32-bit
4 fields
FieldBitsWhat it does
EOC15End of Conversion Interrupt Disable of channel 1
EOC04End of Conversion Interrupt Disable of channel 0
TXRDY11Transmit Ready Interrupt Disable of channel 1
TXRDY00Transmit Ready Interrupt Disable of channel 0

DACC_IMRInterrupt Mask Register

Address
0x4004002C
Reset
0x00000000
Access
read only
Size
32-bit
4 fields
FieldBitsWhat it does
EOC15End of Conversion Interrupt Mask of channel 1
EOC04End of Conversion Interrupt Mask of channel 0
TXRDY11Transmit Ready Interrupt Mask of channel 1
TXRDY00Transmit Ready Interrupt Mask of channel 0

DACC_ISRInterrupt Status Register

Address
0x40040030
Reset
0x00000000
Access
read only
Size
32-bit
4 fields
FieldBitsWhat it does
EOC15End of Conversion Interrupt Flag of channel 1
EOC04End of Conversion Interrupt Flag of channel 0
TXRDY11Transmit Ready Interrupt Flag of channel 1
TXRDY00Transmit Ready Interrupt Flag of channel 0

DACC_ACRAnalog Current Register

Address
0x40040094
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
IBCTLCH13:2Analog Output Current Control
IBCTLCH01:0Analog Output Current Control

DACC_WPMRWrite Protection Mode Register

Address
0x400400E4
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
WPEN0Write Protection Enable
WPKEY31:8Write Protect Key
  • 4473155 Writing any other value in this field aborts the write operation of bit WPEN.Always reads as 0.

DACC_WPSRWrite Protection Status Register

Address
0x400400E8
Reset
0x00000000
Access
read only
Size
32-bit
2 fields
FieldBitsWhat it does
WPVSRC15:8Write Protection Violation Source
WPVS0Write Protection Violation Status