ATxmega128A1 DACA registers

The 10 registers of DACA (Digital-to-Analog Converter), from 0x300, with their reset value and every field. The ATxmega128A1 has 721 registers in 72 peripherals, one page each.

DACA Digital-to-Analog Converter

CTRLAControl Register A

Address
0x300
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4IDOEN
  5. 3CH1EN
  6. 2CH0EN
  7. 1LPMODE
  8. 0ENABLE
5 fields
FieldBitsWhat it does
IDOEN4Internal Output Enable
CH1EN3Channel 1 Output Enable
CH0EN2Channel 0 Output Enable
LPMODE1Low Power Mode
ENABLE0Enable

CTRLBControl Register B

Address
0x301
Reset
0x00
Access
read/write
  1. 7–
  2. 6CHSEL1
  3. 5CHSEL0
  4. 4–
  5. 3–
  6. 2–
  7. 1CH1TRIG
  8. 0CH0TRIG
3 fields
FieldBitsWhat it does
CHSEL6:5Channel Select
  • 0 Single channel operation (Channel 0 only)
  • 2 Dual channel operation (S/H on both channels)
CH1TRIG1Channel 1 Event Trig Enable
CH0TRIG0Channel 0 Event Trig Enable

CTRLCControl Register C

Address
0x302
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4REFSEL1
  5. 3REFSEL0
  6. 2–
  7. 1–
  8. 0LEFTADJ
2 fields
FieldBitsWhat it does
REFSEL4:3Reference Select
  • 0 Internal 1V
  • 1 Analog supply voltage
  • 2 External reference on AREF on PORTA
  • 3 External reference on AREF on PORTB
LEFTADJ0Left-adjust Result

EVCTRLEvent Input Control

Address
0x303
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2EVSEL2
  7. 1EVSEL1
  8. 0EVSEL0
1 field
FieldBitsWhat it does
EVSEL2:0Event Input Selection
  • 0 Event Channel 0
  • 1 Event Channel 1
  • 2 Event Channel 2
  • 3 Event Channel 3
  • 4 Event Channel 4
  • 5 Event Channel 5
  • 6 Event Channel 6
  • 7 Event Channel 7

TIMCTRLTiming Control

Address
0x304
Reset
0x00
Access
read/write
  1. 7–
  2. 6CONINTVAL2
  3. 5CONINTVAL1
  4. 4CONINTVAL0
  5. 3REFRESH3
  6. 2REFRESH2
  7. 1REFRESH1
  8. 0REFRESH0
2 fields
FieldBitsWhat it does
CONINTVAL6:4Conversion Interval
  • 0 1 CLK / 2 CLK in S/H mode
  • 1 2 CLK / 3 CLK in S/H mode
  • 2 4 CLK / 6 CLK in S/H mode
  • 3 8 CLK / 12 CLK in S/H mode
  • 4 16 CLK / 24 CLK in S/H mode
  • 5 32 CLK / 48 CLK in S/H mode
  • 6 64 CLK / 96 CLK in S/H mode
  • 7 128 CLK / 192 CLK in S/H mode
REFRESH3:0Refresh Timing Control
  • 0 16 CLK
  • 1 32 CLK
  • 2 64 CLK
  • 3 128 CLK
  • 4 256 CLK
  • 5 512 CLK
  • 6 1024 CLK
  • 7 2048 CLK
  • 8 4096 CLK
  • 9 8192 CLK
  • 10 16384 CLK
  • 11 32768 CLK
  • 12 65536 CLK
  • 15 Auto refresh OFF

STATUSStatus

Address
0x305
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CH1DRE
  8. 0CH0DRE
2 fields
FieldBitsWhat it does
CH1DRE1Channel 1 Data Register Empty
CH0DRE0Channel 0 Data Register Empty

GAINCALGain Calibration

Address
0x308
Reset
0x00
Access
read/write
  1. 7–
  2. 6GAINCAL6
  3. 5GAINCAL5
  4. 4GAINCAL4
  5. 3GAINCAL3
  6. 2GAINCAL2
  7. 1GAINCAL1
  8. 0GAINCAL0
1 field
FieldBitsWhat it does
GAINCAL6:0Gain Calibration

OFFSETCALOffset Calibration

Address
0x309
Reset
0x00
Access
read/write
  1. 7–
  2. 6OFFSETCAL6
  3. 5OFFSETCAL5
  4. 4OFFSETCAL4
  5. 3OFFSETCAL3
  6. 2OFFSETCAL2
  7. 1OFFSETCAL1
  8. 0OFFSETCAL0
1 field
FieldBitsWhat it does
OFFSETCAL6:0Offset Calibration

CH0DATAChannel 0 Data

Address
0x318
Reset
0x0000
Access
read/write
Size
16-bit

CH1DATAChannel 1 Data

Address
0x31A
Reset
0x0000
Access
read/write
Size
16-bit