ATxmega128A1U TCD2 registers

The 20 registers of TCD2 (16-bit Timer/Counter type 2), from 0x900, with their reset value and every field. The ATxmega128A1U has 846 registers in 78 peripherals, one page each.

TCD2 16-bit Timer/Counter type 2

CTRLAControl Register A

Address
0x900
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKSEL3
  6. 2CLKSEL2
  7. 1CLKSEL1
  8. 0CLKSEL0
1 field
FieldBitsWhat it does
CLKSEL3:0Clock Selection
  • 0 Timer Off
  • 1 System Clock
  • 2 System Clock / 2
  • 3 System Clock / 4
  • 4 System Clock / 8
  • 5 System Clock / 64
  • 6 System Clock / 256
  • 7 System Clock / 1024
  • 8 Event Channel 0
  • 9 Event Channel 1
  • 10 Event Channel 2
  • 11 Event Channel 3
  • 12 Event Channel 4
  • 13 Event Channel 5
  • 14 Event Channel 6
  • 15 Event Channel 7

CTRLBControl Register B

Address
0x901
Reset
0x00
Access
read/write
  1. 7HCMPDEN
  2. 6HCMPCEN
  3. 5HCMPBEN
  4. 4HCMPAEN
  5. 3LCMPDEN
  6. 2LCMPCEN
  7. 1LCMPBEN
  8. 0LCMPAEN
8 fields
FieldBitsWhat it does
HCMPDEN7High Byte Compare D Enable
HCMPCEN6High Byte Compare C Enable
HCMPBEN5High Byte Compare B Enable
HCMPAEN4High Byte Compare A Enable
LCMPDEN3Low Byte Compare D Enable
LCMPCEN2Low Byte Compare C Enable
LCMPBEN1Low Byte Compare B Enable
LCMPAEN0Low Byte Compare A Enable

CTRLCControl register C

Address
0x902
Reset
0x00
Access
read/write
  1. 7HCMPD
  2. 6HCMPC
  3. 5HCMPB
  4. 4HCMPA
  5. 3LCMPD
  6. 2LCMPC
  7. 1LCMPB
  8. 0LCMPA
8 fields
FieldBitsWhat it does
HCMPD7High Byte Compare D Output Value
HCMPC6High Byte Compare C Output Value
HCMPB5High Byte Compare B Output Value
HCMPA4High Byte Compare A Output Value
LCMPD3Low Byte Compare D Output Value
LCMPC2Low Byte Compare C Output Value
LCMPB1Low Byte Compare B Output Value
LCMPA0Low Byte Compare A Output Value

CTRLEControl Register E

Address
0x904
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1BYTEM1
  8. 0BYTEM0
1 field
FieldBitsWhat it does
BYTEM1:0Byte Mode
  • 0 16-bit mode
  • 1 Timer/Counter operating in byte mode only (TC2)
  • 2 Timer/Counter split into two 8-bit Counters

INTCTRLAInterrupt Control Register A

Address
0x906
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3HUNFINTLVL1
  6. 2HUNFINTLVL0
  7. 1LUNFINTLVL1
  8. 0LUNFINTLVL0
2 fields
FieldBitsWhat it does
HUNFINTLVL3:2High Byte Underflow Interrupt Level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level
LUNFINTLVL1:0Low Byte Underflow interrupt level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level

INTCTRLBInterrupt Control Register B

Address
0x907
Reset
0x00
Access
read/write
  1. 7LCMPDINTLVL1
  2. 6LCMPDINTLVL0
  3. 5LCMPCINTLVL1
  4. 4LCMPCINTLVL0
  5. 3LCMPBINTLVL1
  6. 2LCMPBINTLVL0
  7. 1LCMPAINTLVL1
  8. 0LCMPAINTLVL0
4 fields
FieldBitsWhat it does
LCMPDINTLVL7:6Low Byte Compare D Interrupt Level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level
LCMPCINTLVL5:4Low Byte Compare C Interrupt Level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level
LCMPBINTLVL3:2Low Byte Compare B Interrupt Level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level
LCMPAINTLVL1:0Low Byte Compare A Interrupt Level
  • 0 Interrupt Disabled
  • 1 Low Level
  • 2 Medium Level
  • 3 High Level

CTRLFControl Register F

Address
0x909
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1CMDEN1
  8. 0CMDEN0
2 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 2 Force Restart
  • 3 Force Hard Reset
CMDEN1:0Command Enable
  • 1 Low Byte Timer/Counter
  • 2 High Byte Timer/Counter
  • 3 Both Low Byte and High Byte Timer/Counters

INTFLAGSInterrupt Flag Register

Address
0x90C
Reset
0x00
Access
read/write
  1. 7LCMPDIF
  2. 6LCMPCIF
  3. 5LCMPBIF
  4. 4LCMPAIF
  5. 3–
  6. 2–
  7. 1HUNFIF
  8. 0LUNFIF
6 fields
FieldBitsWhat it does
LCMPDIF7Low Byte Compare D Interrupt Flag
LCMPCIF6Low Byte Compare C Interrupt Flag
LCMPBIF5Low Byte Compare B Interrupt Flag
LCMPAIF4Low Byte Compare A Interrupt Flag
HUNFIF1High Byte Underflow Interrupt Flag
LUNFIF0Low Byte Underflow Interrupt Flag

LCNTLow Byte Count

Address
0x920
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCNTHigh Byte Count

Address
0x921
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LPERLow Byte Period

Address
0x926
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HPERHigh Byte Period

Address
0x927
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LCMPALow Byte Compare A

Address
0x928
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMPAHigh Byte Compare A

Address
0x929
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LCMPBLow Byte Compare B

Address
0x92A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMPBHigh Byte Compare B

Address
0x92B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LCMPCLow Byte Compare C

Address
0x92C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMPCHigh Byte Compare C

Address
0x92D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LCMPDLow Byte Compare D

Address
0x92E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMPDHigh Byte Compare D

Address
0x92F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–