ATxmega192D3 PORT_CFG registers The 4 registers of PORT_CFG (Port Configuration), from 0xB0, with their reset value and every field. The ATxmega192D3 has 548 registers in 52 peripherals, one page each.
PORT_CFG Port Configuration MPCMASKMulti-pin Configuration Mask
Address 0xB0
Reset 0x00
Access read/write 7 MPCMASK7 6 MPCMASK6 5 MPCMASK5 4 MPCMASK4 3 MPCMASK3 2 MPCMASK2 1 MPCMASK1 0 MPCMASK0 VPCTRLAVirtual Port Control Register A
Address 0xB2
Reset 0x00
Access read/write 7 VP1MAP3 6 VP1MAP2 5 VP1MAP1 4 VP1MAP0 3 VP0MAP3 2 VP0MAP2 1 VP0MAP1 0 VP0MAP0 2 fields
Field Bits What it does VP1MAP 7:4 Virtual Port 1 Mapping0 Mapped To PORTA1 Mapped To PORTB2 Mapped To PORTC3 Mapped To PORTD4 Mapped To PORTE5 Mapped To PORTF6 Mapped To PORTG7 Mapped To PORTH8 Mapped To PORTJ9 Mapped To PORTK10 Mapped To PORTL11 Mapped To PORTM12 Mapped To PORTN13 Mapped To PORTP14 Mapped To PORTQ15 Mapped To PORTR VP0MAP 3:0 Virtual Port 0 Mapping0 Mapped To PORTA1 Mapped To PORTB2 Mapped To PORTC3 Mapped To PORTD4 Mapped To PORTE5 Mapped To PORTF6 Mapped To PORTG7 Mapped To PORTH8 Mapped To PORTJ9 Mapped To PORTK10 Mapped To PORTL11 Mapped To PORTM12 Mapped To PORTN13 Mapped To PORTP14 Mapped To PORTQ15 Mapped To PORTR
VPCTRLBVirtual Port Control Register B
Address 0xB3
Reset 0x00
Access read/write 7 VP3MAP3 6 VP3MAP2 5 VP3MAP1 4 VP3MAP0 3 VP2MAP3 2 VP2MAP2 1 VP2MAP1 0 VP2MAP0 2 fields
Field Bits What it does VP3MAP 7:4 Virtual Port 3 Mapping0 Mapped To PORTA1 Mapped To PORTB2 Mapped To PORTC3 Mapped To PORTD4 Mapped To PORTE5 Mapped To PORTF6 Mapped To PORTG7 Mapped To PORTH8 Mapped To PORTJ9 Mapped To PORTK10 Mapped To PORTL11 Mapped To PORTM12 Mapped To PORTN13 Mapped To PORTP14 Mapped To PORTQ15 Mapped To PORTR VP2MAP 3:0 Virtual Port 2 Mapping0 Mapped To PORTA1 Mapped To PORTB2 Mapped To PORTC3 Mapped To PORTD4 Mapped To PORTE5 Mapped To PORTF6 Mapped To PORTG7 Mapped To PORTH8 Mapped To PORTJ9 Mapped To PORTK10 Mapped To PORTL11 Mapped To PORTM12 Mapped To PORTN13 Mapped To PORTP14 Mapped To PORTQ15 Mapped To PORTR
CLKEVOUTClock and Event Out Register
Address 0xB4
Reset 0x00
Access read/write 7 – 6 – 5 EVOUT1 4 EVOUT0 3 – 2 – 1 CLKOUT1 0 CLKOUT0 2 fields
Field Bits What it does EVOUT 5:4 Event Output Port0 Event Output Disabled1 Event Channel 7 Output on Port C pin 72 Event Channel 7 Output on Port D pin 73 Event Channel 7 Output on Port E pin 7 CLKOUT 1:0 Clock Output Port0 Clock Output Disabled1 Clock Output on Port C pin 72 Clock Output on Port D pin 73 Clock Output on Port E pin 7
BETA