ATxmega256C3 ADCA registers

The 11 registers of ADCA (Analog/Digital Converter), from 0x200, with their reset value and every field. The ATxmega256C3 has 550 registers in 51 peripherals, one page each.

ADCA Analog/Digital Converter

CTRLAControl Register A

Address
0x200
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CH0START
  7. 1FLUSH
  8. 0ENABLE
3 fields
FieldBitsWhat it does
CH0START2Channel 0 Start Conversion
FLUSH1ADC Flush
ENABLE0Enable ADC

CTRLBControl Register B

Address
0x201
Reset
0x00
Access
read/write
  1. 7–
  2. 6CURRLIMIT1
  3. 5CURRLIMIT0
  4. 4CONMODE
  5. 3FREERUN
  6. 2RESOLUTION1
  7. 1RESOLUTION0
  8. 0–
4 fields
FieldBitsWhat it does
CURRLIMIT6:5Current Limitation
  • 0 No current limit, 300ksps max sampling rate
  • 1 Low current limit, 250ksps max sampling rate
  • 2 Medium current limit, 150ksps max sampling rate
  • 3 High current limit, 50ksps max sampling rate
CONMODE4Conversion Mode
FREERUN3Free Running Mode Enable
RESOLUTION2:1Result Resolution
  • 0 12-bit right-adjusted result
  • 2 8-bit right-adjusted result
  • 3 12-bit left-adjusted result

REFCTRLReference Control

Address
0x202
Reset
0x00
Access
read/write
  1. 7–
  2. 6REFSEL2
  3. 5REFSEL1
  4. 4REFSEL0
  5. 3–
  6. 2–
  7. 1BANDGAP
  8. 0TEMPREF
3 fields
FieldBitsWhat it does
REFSEL6:4Reference Selection
  • 0 Internal 1V
  • 1 Internal VCC / 1.6
  • 2 External reference on PORT A
  • 3 External reference on PORT B
  • 4 Internal VCC / 2
BANDGAP1Bandgap enable
TEMPREF0Temperature Reference Enable

EVCTRLEvent Control

Address
0x203
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4EVSEL1
  5. 3EVSEL0
  6. 2EVACT2
  7. 1EVACT1
  8. 0EVACT0
2 fields
FieldBitsWhat it does
EVSEL4:3Event Input Select
  • 0 Event Channel 0
  • 1 Event Channel 1
  • 2 Event Channel 2
  • 3 Event Channel 3
EVACT2:0Event Action Select
  • 0 No event action
  • 1 First event triggers channel 0
  • 6 The ADC is flushed and restarted for accurate timing

PRESCALERClock Prescaler

Address
0x204
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2PRESCALER2
  7. 1PRESCALER1
  8. 0PRESCALER0
1 field
FieldBitsWhat it does
PRESCALER2:0Clock Prescaler Selection
  • 0 Divide clock by 4
  • 1 Divide clock by 8
  • 2 Divide clock by 16
  • 3 Divide clock by 32
  • 4 Divide clock by 64
  • 5 Divide clock by 128
  • 6 Divide clock by 256
  • 7 Divide clock by 512

INTFLAGSInterrupt Flags

Address
0x206
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CH0IF
1 field
FieldBitsWhat it does
CH0IF0Channel 0 Interrupt Flag

TEMPTemporary Register

Address
0x207
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SAMPCTRLSampling Time Control Register

Address
0x208
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5SAMPVAL5
  4. 4SAMPVAL4
  5. 3SAMPVAL3
  6. 2SAMPVAL2
  7. 1SAMPVAL1
  8. 0SAMPVAL0
1 field
FieldBitsWhat it does
SAMPVAL5:0Sampling Time Control

CALCalibration Value

Address
0x20C
Reset
0x0000
Access
read/write
Size
16-bit

CH0RESChannel 0 Result

Address
0x210
Reset
0x0000
Access
read/write
Size
16-bit

CMPCompare Value

Address
0x218
Reset
0x0000
Access
read/write
Size
16-bit