ATxmega32A4 USARTC1 registers The 7 registers of USARTC1 (Universal Synchronous/Asynchronous Receiver/Transmitter), from 0x8B0, with their reset value and every field. The ATxmega32A4 has 472 registers in 51 peripherals, one page each.
USARTC1 Universal Synchronous/Asynchronous Receiver/Transmitter DATAData Register
Address 0x8B0
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – STATUSStatus Register
Address 0x8B1
Reset 0x00
Access read/write 7 RXCIF 6 TXCIF 5 DREIF 4 FERR 3 BUFOVF 2 PERR 1 – 0 RXB8 7 fields
Field Bits What it does RXCIF 7 Receive Interrupt Flag TXCIF 6 Transmit Interrupt Flag DREIF 5 Data Register Empty Flag FERR 4 Frame Error BUFOVF 3 Buffer Overflow PERR 2 Parity Error RXB8 0 Receive Bit 8
CTRLAControl Register A
Address 0x8B3
Reset 0x00
Access read/write 7 – 6 – 5 RXCINTLVL1 4 RXCINTLVL0 3 TXCINTLVL1 2 TXCINTLVL0 1 DREINTLVL1 0 DREINTLVL0 3 fields
Field Bits What it does RXCINTLVL 5:4 Receive Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level TXCINTLVL 3:2 Transmit Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level DREINTLVL 1:0 Data Register Empty Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level
CTRLBControl Register B
Address 0x8B4
Reset 0x00
Access read/write 7 – 6 – 5 – 4 RXEN 3 TXEN 2 CLK2X 1 MPCM 0 TXB8 5 fields
Field Bits What it does RXEN 4 Receiver Enable TXEN 3 Transmitter Enable CLK2X 2 Double transmission speed MPCM 1 Multi-processor Communication Mode TXB8 0 Transmit bit 8
CTRLCControl Register C
Address 0x8B5
Reset 0x00
Access read/write 7 CMODE1 6 CMODE0 5 PMODE1 4 PMODE0 3 SBMODE 2 CHSIZE2 1 CHSIZE1 0 CHSIZE0 6 fields
Field Bits What it does CMODE 7:6 Communication Mode0 Asynchronous Mode1 Synchronous Mode2 IrDA Mode3 Master SPI Mode PMODE 5:4 Parity Mode0 No Parity2 Even Parity3 Odd Parity SBMODE 3 Stop Bit Mode CHSIZE 2:0 Character Size0 Character size: 5 bit1 Character size: 6 bit2 Character size: 7 bit3 Character size: 8 bit7 Character size: 9 bit UDORD 2 SPI Master Mode, Data Order UCPHA 1 SPI Master Mode, Clock Phase
BAUDCTRLABaud Rate Control Register A
Address 0x8B6
Reset 0x00
Access read/write 7 BSEL7 6 BSEL6 5 BSEL5 4 BSEL4 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 1 field
Field Bits What it does BSEL 7:0 Baud Rate Selection Bits [7:0]
BAUDCTRLBBaud Rate Control Register B
Address 0x8B7
Reset 0x00
Access read/write 7 BSCALE3 6 BSCALE2 5 BSCALE1 4 BSCALE0 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 2 fields
Field Bits What it does BSCALE 7:4 Baud Rate Scale BSEL 3:0 Baud Rate Selection bits[11:8]
BETA