ATxmega32D4 WDT registers The 3 registers of WDT (Watch-Dog Timer), from 0x80, with their reset value and every field. The ATxmega32D4 has 423 registers in 44 peripherals, one page each.
WDT Watch-Dog Timer CTRLControl
Address 0x80
Reset 0x00
Access read/write 7 – 6 – 5 PER3 4 PER2 3 PER1 2 PER0 1 ENABLE 0 CEN 3 fields
Field Bits What it does PER 5:2 Period0 8 cycles (8ms @ 3.3V)1 16 cycles (16ms @ 3.3V)2 32 cycles (32ms @ 3.3V)3 64 cycles (64ms @ 3.3V)4 128 cycles (0.128s @ 3.3V)5 256 cycles (0.256s @ 3.3V)6 512 cycles (0.512s @ 3.3V)7 1K cycles (1s @ 3.3V)8 2K cycles (2s @ 3.3V)9 4K cycles (4s @ 3.3V)10 8K cycles (8s @ 3.3V) ENABLE 1 Enable CEN 0 Change Enable
WINCTRLWindowed Mode Control
Address 0x81
Reset 0x00
Access read/write 7 – 6 – 5 WPER3 4 WPER2 3 WPER1 2 WPER0 1 WEN 0 WCEN 3 fields
Field Bits What it does WPER 5:2 Windowed Mode Period0 8 cycles (8ms @ 3.3V)1 16 cycles (16ms @ 3.3V)2 32 cycles (32ms @ 3.3V)3 64 cycles (64ms @ 3.3V)4 128 cycles (0.128s @ 3.3V)5 256 cycles (0.256s @ 3.3V)6 512 cycles (0.512s @ 3.3V)7 1K cycles (1s @ 3.3V)8 2K cycles (2s @ 3.3V)9 4K cycles (4s @ 3.3V)10 8K cycles (8s @ 3.3V) WEN 1 Windowed Mode Enable WCEN 0 Windowed Mode Change Enable
STATUSStatus
Address 0x82
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 SYNCBUSY 1 field
Field Bits What it does SYNCBUSY 0 Synchronization busy
BETA