AVR128DA28S TCD0 registers

The 24 registers of TCD0 (Timer Counter D), from 0xB80, with their reset value and every field. The AVR128DA28S has 473 registers in 45 peripherals, one page each.

TCD0 Timer Counter D

CTRLAControl A

Address
0xB80
Reset
0x00
Access
read/write
  1. 7–
  2. 6CLKSEL1
  3. 5CLKSEL0
  4. 4CNTPRES1
  5. 3CNTPRES0
  6. 2SYNCPRES1
  7. 1SYNCPRES0
  8. 0ENABLE
4 fields
FieldBitsWhat it does
CLKSEL6:5Clock select
  • 0 Internal High-Frequency Oscillator
  • 1 PLL
  • 2 External Clock
  • 3 Peripheral Clock
CNTPRES4:3Counter prescaler
  • 0 Sync clock divided by 1
  • 1 Sync clock divided by 4
  • 2 Sync clock divided by 32
SYNCPRES2:1Synchronization prescaler
  • 0 Selected clock source divided by 1
  • 1 Selected clock source divided by 2
  • 2 Selected clock source divided by 4
  • 3 Selected clock source divided by 8
ENABLE0Enable

CTRLBControl B

Address
0xB81
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WGMODE1
  8. 0WGMODE0
1 field
FieldBitsWhat it does
WGMODE1:0Waveform generation mode
  • 0 One ramp mode
  • 1 Two ramp mode
  • 2 Four ramp mode
  • 3 Dual slope mode

CTRLCControl C

Address
0xB82
Reset
0x00
Access
read/write
  1. 7CMPDSEL
  2. 6CMPCSEL
  3. 5–
  4. 4–
  5. 3FIFTY
  6. 2–
  7. 1AUPDATE
  8. 0CMPOVR
5 fields
FieldBitsWhat it does
CMPDSEL7Compare D output select
  • 0 PWM A output
  • 1 PWM B output
CMPCSEL6Compare C output select
  • 0 PWM A output
  • 1 PWM B output
FIFTY3Fifty percent waveform
AUPDATE1Auto update
CMPOVR0Compare output value override

CTRLDControl D

Address
0xB83
Reset
0x00
Access
read/write
  1. 7CMPBVAL3
  2. 6CMPBVAL2
  3. 5CMPBVAL1
  4. 4CMPBVAL0
  5. 3CMPAVAL3
  6. 2CMPAVAL2
  7. 1CMPAVAL1
  8. 0CMPAVAL0
2 fields
FieldBitsWhat it does
CMPBVAL7:4Compare B value
CMPAVAL3:0Compare A value

CTRLEControl E

Address
0xB84
Reset
0x00
Access
read/write
  1. 7DISEOC
  2. 6–
  3. 5–
  4. 4SCAPTUREB
  5. 3SCAPTUREA
  6. 2RESTART
  7. 1SYNC
  8. 0SYNCEOC
6 fields
FieldBitsWhat it does
DISEOC7Disable at end of cycle
SCAPTUREB4Software Capture B Strobe
SCAPTUREA3Software Capture A Strobe
RESTART2Restart strobe
SYNC1synchronize strobe
SYNCEOC0Synchronize end of cycle strobe

EVCTRLAEVCTRLA

Address
0xB88
Reset
0x00
Access
read/write
  1. 7CFG1
  2. 6CFG0
  3. 5–
  4. 4EDGE
  5. 3–
  6. 2ACTION
  7. 1–
  8. 0TRIGEI
4 fields
FieldBitsWhat it does
CFG7:6Event config
  • 0 Neither Filter nor Asynchronous Event is enabled
  • 1 Input Capture Noise Cancellation Filter enabled
  • 2 Asynchronous Event output qualification enabled
EDGE4Edge select
  • 0 The falling edge or low level of event generates retrigger or fault action
  • 1 The rising edge or high level of event generates retrigger or fault action
ACTION2Event action
  • 0 Event trigger a fault
  • 1 Event trigger a fault and capture
TRIGEI0Trigger event enable

EVCTRLBEVCTRLB

Address
0xB89
Reset
0x00
Access
read/write
  1. 7CFG1
  2. 6CFG0
  3. 5–
  4. 4EDGE
  5. 3–
  6. 2ACTION
  7. 1–
  8. 0TRIGEI
4 fields
FieldBitsWhat it does
CFG7:6Event config
  • 0 Neither Filter nor Asynchronous Event is enabled
  • 1 Input Capture Noise Cancellation Filter enabled
  • 2 Asynchronous Event output qualification enabled
EDGE4Edge select
  • 0 The falling edge or low level of event generates retrigger or fault action
  • 1 The rising edge or high level of event generates retrigger or fault action
ACTION2Event action
  • 0 Event trigger a fault
  • 1 Event trigger a fault and capture
TRIGEI0Trigger event enable

INTCTRLInterrupt Control

Address
0xB8C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3TRIGB
  6. 2TRIGA
  7. 1–
  8. 0OVF
3 fields
FieldBitsWhat it does
TRIGB3Trigger B interrupt enable
TRIGA2Trigger A interrupt enable
OVF0Overflow interrupt enable

INTFLAGSInterrupt Flags

Address
0xB8D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3TRIGB
  6. 2TRIGA
  7. 1–
  8. 0OVF
3 fields
FieldBitsWhat it does
TRIGB3Trigger B interrupt enable
TRIGA2Trigger A interrupt enable
OVF0Overflow interrupt enable

STATUSStatus

Address
0xB8E
Reset
0x00
Access
read/write
  1. 7PWMACTB
  2. 6PWMACTA
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CMDRDY
  8. 0ENRDY
4 fields
FieldBitsWhat it does
PWMACTB7PWM activity on B
PWMACTA6PWM activity on A
CMDRDY1Command ready
ENRDY0Enable ready

INPUTCTRLAInput Control A

Address
0xB90
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INPUTMODE3
  6. 2INPUTMODE2
  7. 1INPUTMODE1
  8. 0INPUTMODE0
1 field
FieldBitsWhat it does
INPUTMODE3:0Input mode
  • 0 Input has no actions
  • 1 Stop output, jump to opposite compare cycle and wait
  • 2 Stop output, execute opposite compare cycle and wait
  • 3 stop output, execute opposite compare cycle while fault active
  • 4 Stop all outputs, maintain frequency
  • 5 Stop all outputs, execute dead time while fault active
  • 6 Stop all outputs, jump to next compare cycle and wait
  • 7 Stop all outputs, wait for software action
  • 8 Stop output on edge, jump to next compare cycle
  • 9 Stop output on edge, maintain frequency
  • 10 Stop output at level, maintain frequency

INPUTCTRLBInput Control B

Address
0xB91
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INPUTMODE3
  6. 2INPUTMODE2
  7. 1INPUTMODE1
  8. 0INPUTMODE0
1 field
FieldBitsWhat it does
INPUTMODE3:0Input mode
  • 0 Input has no actions
  • 1 Stop output, jump to opposite compare cycle and wait
  • 2 Stop output, execute opposite compare cycle and wait
  • 3 stop output, execute opposite compare cycle while fault active
  • 4 Stop all outputs, maintain frequency
  • 5 Stop all outputs, execute dead time while fault active
  • 6 Stop all outputs, jump to next compare cycle and wait
  • 7 Stop all outputs, wait for software action
  • 8 Stop output on edge, jump to next compare cycle
  • 9 Stop output on edge, maintain frequency
  • 10 Stop output at level, maintain frequency

FAULTCTRLFault Control

Address
0xB92
Reset
0x00
Access
read/write
  1. 7CMPDEN
  2. 6CMPCEN
  3. 5CMPBEN
  4. 4CMPAEN
  5. 3CMPD
  6. 2CMPC
  7. 1CMPB
  8. 0CMPA
8 fields
FieldBitsWhat it does
CMPDEN7Compare D enable
CMPCEN6Compare C enable
CMPBEN5Compare B enable
CMPAEN4Compare A enable
CMPD3Compare D vaule
CMPC2Compare C value
CMPB1Compare B value
CMPA0Compare A value

DLYCTRLDelay Control

Address
0xB94
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5DLYPRESC1
  4. 4DLYPRESC0
  5. 3DLYTRIG1
  6. 2DLYTRIG0
  7. 1DLYSEL1
  8. 0DLYSEL0
3 fields
FieldBitsWhat it does
DLYPRESC5:4Delay prescaler
  • 0 No prescaling
  • 1 Prescale with 2
  • 2 Prescale with 4
  • 3 Prescale with 8
DLYTRIG3:2Delay trigger
  • 0 Compare A set
  • 1 Compare A clear
  • 2 Compare B set
  • 3 Compare B clear
DLYSEL1:0Delay select
  • 0 No delay
  • 1 Input blanking enabled
  • 2 Event delay enabled

DLYVALDelay value

Address
0xB95
Reset
0x00
Access
read/write
  1. 7DLYVAL7
  2. 6DLYVAL6
  3. 5DLYVAL5
  4. 4DLYVAL4
  5. 3DLYVAL3
  6. 2DLYVAL2
  7. 1DLYVAL1
  8. 0DLYVAL0
1 field
FieldBitsWhat it does
DLYVAL7:0Delay value

DITCTRLDither Control A

Address
0xB98
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1DITHERSEL1
  8. 0DITHERSEL0
1 field
FieldBitsWhat it does
DITHERSEL1:0Dither select
  • 0 On-time ramp B
  • 1 On-time ramp A and B
  • 2 Dead-time rampB
  • 3 Dead-time ramp A and B

DITVALDither value

Address
0xB99
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3DITHER3
  6. 2DITHER2
  7. 1DITHER1
  8. 0DITHER0
1 field
FieldBitsWhat it does
DITHER3:0Dither value

DBGCTRLDebug Control

Address
0xB9E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2FAULTDET
  7. 1–
  8. 0DBGRUN
2 fields
FieldBitsWhat it does
FAULTDET2Fault detection
DBGRUN0Debug run

CAPTUREACapture A

Address
0xBA2
Reset
0x0000
Access
read only
Size
16-bit
1 field
FieldBitsWhat it does
CAPTUREA11:0Capture A

CAPTUREBCapture B

Address
0xBA4
Reset
0x0000
Access
read only
Size
16-bit
1 field
FieldBitsWhat it does
CAPTUREB11:0Capture B

CMPASETCompare A Set

Address
0xBA8
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPASET11:0Compare A Set

CMPACLRCompare A Clear

Address
0xBAA
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPACLR11:0Compare A Clear

CMPBSETCompare B Set

Address
0xBAC
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPBSET11:0Compare B Set

CMPBCLRCompare B Clear

Address
0xBAE
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
COMPBCLR11:0Compare B Clear