AVR128DB48 SPI1 registers The 5 registers of SPI1 (Serial Peripheral Interface), from 0x960, with their reset value and every field. The AVR128DB48 has 691 registers in 58 peripherals, one page each.
SPI1 Serial Peripheral Interface CTRLAControl A
Address 0x960
Reset 0x00
Access read/write 7 – 6 DORD 5 MASTER 4 CLK2X 3 – 2 PRESC1 1 PRESC0 0 ENABLE 5 fields
Field Bits What it does DORD 6 Data Order Setting MASTER 5 Host Operation Enable CLK2X 4 Enable Double Speed PRESC 2:1 Prescaler0 CLK_PER / 41 CLK_PER / 162 CLK_PER / 643 CLK_PER / 128 ENABLE 0 Enable Module
CTRLBControl B
Address 0x961
Reset 0x00
Access read/write 7 BUFEN 6 BUFWR 5 – 4 – 3 – 2 SSD 1 MODE1 0 MODE0 4 fields
Field Bits What it does BUFEN 7 Buffer Mode Enable BUFWR 6 Buffer Mode Wait for Receive SSD 2 SPI Select Disable MODE 1:0 SPI Mode0 SPI Mode 01 SPI Mode 12 SPI Mode 23 SPI Mode 3
INTCTRLInterrupt Control
Address 0x962
Reset 0x00
Access read/write 7 RXCIE 6 TXCIE 5 DREIE 4 SSIE 3 – 2 – 1 – 0 IE 5 fields
Field Bits What it does RXCIE 7 Receive Complete Interrupt Enable TXCIE 6 Transfer Complete Interrupt Enable DREIE 5 Data Register Empty Interrupt Enable SSIE 4 SPI Select Trigger Interrupt Enable IE 0 Interrupt Enable
INTFLAGSInterrupt Flags
Address 0x963
Reset 0x00
Access read/write 7 IF 6 TXCIF 5 DREIF 4 SSIF 3 – 2 – 1 – 0 BUFOVF 7 fields
Field Bits What it does IF 7 Interrupt Flag RXCIF 7 Receive Complete Interrupt Flag TXCIF 6 Transfer Complete Interrupt Flag WRCOL 6 Write Collision DREIF 5 Data Register Empty Interrupt Flag SSIF 4 SPI Select Trigger Interrupt Flag BUFOVF 0 Buffer Overflow
DATAData
Address 0x964
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – 
BETA