AVR32DA48S ADC0 registers

The 17 registers of ADC0 (Analog to Digital Converter), from 0x600, with their reset value and every field. The AVR32DA48S has 659 registers in 56 peripherals, one page each.

ADC0 Analog to Digital Converter

CTRLAControl A

Address
0x600
Reset
0x00
Access
read/write
  1. 7RUNSTBY
  2. 6–
  3. 5CONVMODE
  4. 4LEFTADJ
  5. 3RESSEL1
  6. 2RESSEL0
  7. 1FREERUN
  8. 0ENABLE
6 fields
FieldBitsWhat it does
RUNSTBY7Run standby mode
CONVMODE5Conversion mode
  • 0 Single-Ended mode
  • 1 Differential mode
LEFTADJ4Left adjust result
RESSEL3:2Resolution selection
  • 0 12-bit mode
  • 1 10-bit mode
FREERUN1Free running mode
ENABLE0ADC Enable

CTRLBControl B

Address
0x601
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SAMPNUM2
  7. 1SAMPNUM1
  8. 0SAMPNUM0
1 field
FieldBitsWhat it does
SAMPNUM2:0Accumulation Samples
  • 0 No accumulation
  • 1 2 results accumulated
  • 2 4 results accumulated
  • 3 8 results accumulated
  • 4 16 results accumulated
  • 5 32 results accumulated
  • 6 64 results accumulated
  • 7 128 results accumulated

CTRLCControl C

Address
0x602
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3PRESC3
  6. 2PRESC2
  7. 1PRESC1
  8. 0PRESC0
1 field
FieldBitsWhat it does
PRESC3:0Clock Pre-scaler
  • 0 CLK_PER divided by 2
  • 1 CLK_PER divided by 4
  • 2 CLK_PER divided by 8
  • 3 CLK_PER divided by 12
  • 4 CLK_PER divided by 16
  • 5 CLK_PER divided by 20
  • 6 CLK_PER divided by 24
  • 7 CLK_PER divided by 28
  • 8 CLK_PER divided by 32
  • 9 CLK_PER divided by 48
  • 10 CLK_PER divided by 64
  • 11 CLK_PER divided by 96
  • 12 CLK_PER divided by 128
  • 13 CLK_PER divided by 256

CTRLDControl D

Address
0x603
Reset
0x00
Access
read/write
  1. 7INITDLY2
  2. 6INITDLY1
  3. 5INITDLY0
  4. 4–
  5. 3SAMPDLY3
  6. 2SAMPDLY2
  7. 1SAMPDLY1
  8. 0SAMPDLY0
2 fields
FieldBitsWhat it does
INITDLY7:5Initial Delay Selection
  • 0 Delay 0 CLK_ADC cycles
  • 1 Delay 16 CLK_ADC cycles
  • 2 Delay 32 CLK_ADC cycles
  • 3 Delay 64 CLK_ADC cycles
  • 4 Delay 128 CLK_ADC cycles
  • 5 Delay 256 CLK_ADC cycles
SAMPDLY3:0Sampling Delay Selection
  • 0 Delay 0 CLK_ADC cycles
  • 1 Delay 1 CLK_ADC cycles
  • 2 Delay 2 CLK_ADC cycles
  • 3 Delay 3 CLK_ADC cycles
  • 4 Delay 4 CLK_ADC cycles
  • 5 Delay 5 CLK_ADC cycles
  • 6 Delay 6 CLK_ADC cycles
  • 7 Delay 7 CLK_ADC cycles
  • 8 Delay 8 CLK_ADC cycles
  • 9 Delay 9 CLK_ADC cycles
  • 10 Delay 10 CLK_ADC cycles
  • 11 Delay 11 CLK_ADC cycles
  • 12 Delay 12 CLK_ADC cycles
  • 13 Delay 13 CLK_ADC cycles
  • 14 Delay 14 CLK_ADC cycles
  • 15 Delay 15 CLK_ADC cycles

CTRLEControl E

Address
0x604
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2WINCM2
  7. 1WINCM1
  8. 0WINCM0
1 field
FieldBitsWhat it does
WINCM2:0Window Comparator Mode
  • 0 No Window Comparison
  • 1 Below Window
  • 2 Above Window
  • 3 Inside Window
  • 4 Outside Window

SAMPCTRLSample Control

Address
0x605
Reset
0x00
Access
read/write
  1. 7SAMPLEN7
  2. 6SAMPLEN6
  3. 5SAMPLEN5
  4. 4SAMPLEN4
  5. 3SAMPLEN3
  6. 2SAMPLEN2
  7. 1SAMPLEN1
  8. 0SAMPLEN0
1 field
FieldBitsWhat it does
SAMPLEN7:0Sample lenght

MUXPOSPositive mux input

Address
0x608
Reset
0x00
Access
read/write
  1. 7–
  2. 6MUXPOS6
  3. 5MUXPOS5
  4. 4MUXPOS4
  5. 3MUXPOS3
  6. 2MUXPOS2
  7. 1MUXPOS1
  8. 0MUXPOS0
1 field
FieldBitsWhat it does
MUXPOS6:0Analog Channel Selection Bits
  • 0 ADC input pin 0
  • 1 ADC input pin 1
  • 2 ADC input pin 2
  • 3 ADC input pin 3
  • 4 ADC input pin 4
  • 5 ADC input pin 5
  • 6 ADC input pin 6
  • 7 ADC input pin 7
  • 8 ADC input pin 8
  • 9 ADC input pin 9
  • 10 ADC input pin 10
  • 11 ADC input pin 11
  • 16 ADC input pin 16
  • 17 ADC input pin 17
  • 18 ADC input pin 18
  • 19 ADC input pin 19
  • 20 ADC input pin 20
  • 21 ADC input pin 21
  • 64 Ground
  • 66 Temperature sensor
  • 72 DAC0

MUXNEGNegative mux input

Address
0x609
Reset
0x00
Access
read/write
  1. 7–
  2. 6MUXNEG6
  3. 5MUXNEG5
  4. 4MUXNEG4
  5. 3MUXNEG3
  6. 2MUXNEG2
  7. 1MUXNEG1
  8. 0MUXNEG0
1 field
FieldBitsWhat it does
MUXNEG6:0Analog Channel Selection Bits
  • 0 ADC input pin 0
  • 1 ADC input pin 1
  • 2 ADC input pin 2
  • 3 ADC input pin 3
  • 4 ADC input pin 4
  • 5 ADC input pin 5
  • 6 ADC input pin 6
  • 7 ADC input pin 7
  • 8 ADC input pin 8
  • 9 ADC input pin 9
  • 10 ADC input pin 10
  • 11 ADC input pin 11
  • 64 Ground
  • 72 DAC0

COMMANDCommand

Address
0x60A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1SPCONV
  8. 0STCONV
2 fields
FieldBitsWhat it does
SPCONV1Stop Conversion
STCONV0Start Conversion

EVCTRLEvent Control

Address
0x60B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0STARTEI
1 field
FieldBitsWhat it does
STARTEI0Start Event Input Enable

INTCTRLInterrupt Control

Address
0x60C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WCMP
  8. 0RESRDY
2 fields
FieldBitsWhat it does
WCMP1Window Comparator Interrupt Enable
RESRDY0Result Ready Interrupt Enable

INTFLAGSInterrupt Flags

Address
0x60D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WCMP
  8. 0RESRDY
2 fields
FieldBitsWhat it does
WCMP1Window Comparator Flag
RESRDY0Result Ready Flag

DBGCTRLDebug Control

Address
0x60E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug run

TEMPTemporary Data

Address
0x60F
Reset
0x00
Access
read/write
  1. 7TEMP7
  2. 6TEMP6
  3. 5TEMP5
  4. 4TEMP4
  5. 3TEMP3
  6. 2TEMP2
  7. 1TEMP1
  8. 0TEMP0
1 field
FieldBitsWhat it does
TEMP7:0Temporary

RESADC Accumulator Result

Address
0x610
Reset
0x0000
Access
read only
Size
16-bit

WINLTWindow comparator low threshold

Address
0x612
Reset
0x0000
Access
read/write
Size
16-bit

WINHTWindow comparator high threshold

Address
0x614
Reset
0x0000
Access
read/write
Size
16-bit