AVR32DU32 PORTD registers

The 24 registers of PORTD (I/O Ports), from 0x460, with their reset value and every field. The AVR32DU32 has 408 registers in 39 peripherals, one page each.

PORTD I/O Ports

DIRData Direction

Address
0x460
Reset
0x00
Access
read/write
  1. 7DIR7
  2. 6DIR6
  3. 5DIR5
  4. 4DIR4
  5. 3DIR3
  6. 2DIR2
  7. 1DIR1
  8. 0DIR0

DIRSETData Direction Set

Address
0x461
Reset
0x00
Access
read/write
  1. 7DIRSET7
  2. 6DIRSET6
  3. 5DIRSET5
  4. 4DIRSET4
  5. 3DIRSET3
  6. 2DIRSET2
  7. 1DIRSET1
  8. 0DIRSET0

DIRCLRData Direction Clear

Address
0x462
Reset
0x00
Access
read/write
  1. 7DIRCLR7
  2. 6DIRCLR6
  3. 5DIRCLR5
  4. 4DIRCLR4
  5. 3DIRCLR3
  6. 2DIRCLR2
  7. 1DIRCLR1
  8. 0DIRCLR0

DIRTGLData Direction Toggle

Address
0x463
Reset
0x00
Access
read/write
  1. 7DIRTGL7
  2. 6DIRTGL6
  3. 5DIRTGL5
  4. 4DIRTGL4
  5. 3DIRTGL3
  6. 2DIRTGL2
  7. 1DIRTGL1
  8. 0DIRTGL0

OUTOutput Value

Address
0x464
Reset
0x00
Access
read/write
  1. 7OUT7
  2. 6OUT6
  3. 5OUT5
  4. 4OUT4
  5. 3OUT3
  6. 2OUT2
  7. 1OUT1
  8. 0OUT0

OUTSETOutput Value Set

Address
0x465
Reset
0x00
Access
read/write
  1. 7OUTSET7
  2. 6OUTSET6
  3. 5OUTSET5
  4. 4OUTSET4
  5. 3OUTSET3
  6. 2OUTSET2
  7. 1OUTSET1
  8. 0OUTSET0

OUTCLROutput Value Clear

Address
0x466
Reset
0x00
Access
read/write
  1. 7OUTCLR7
  2. 6OUTCLR6
  3. 5OUTCLR5
  4. 4OUTCLR4
  5. 3OUTCLR3
  6. 2OUTCLR2
  7. 1OUTCLR1
  8. 0OUTCLR0

OUTTGLOutput Value Toggle

Address
0x467
Reset
0x00
Access
read/write
  1. 7OUTTGL7
  2. 6OUTTGL6
  3. 5OUTTGL5
  4. 4OUTTGL4
  5. 3OUTTGL3
  6. 2OUTTGL2
  7. 1OUTTGL1
  8. 0OUTTGL0

INInput Value

Address
0x468
Reset
0x00
Access
read/write
  1. 7IN7
  2. 6IN6
  3. 5IN5
  4. 4IN4
  5. 3IN3
  6. 2IN2
  7. 1IN1
  8. 0IN0

INTFLAGSInterrupt Flags

Address
0x469
Reset
0x00
Access
read/write
  1. 7INT7
  2. 6INT6
  3. 5INT5
  4. 4INT4
  5. 3INT3
  6. 2INT2
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT7:0Pin Interrupt Flag

PORTCTRLPort Control

Address
0x46A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SRL
1 field
FieldBitsWhat it does
SRL0Slew Rate Limit Enable

PINCONFIGPin Control Config

Address
0x46B
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PINCTRLUPDPin Control Update

Address
0x46C
Reset
0x00
Access
read/write
  1. 7PINCTRLUPD7
  2. 6PINCTRLUPD6
  3. 5PINCTRLUPD5
  4. 4PINCTRLUPD4
  5. 3PINCTRLUPD3
  6. 2PINCTRLUPD2
  7. 1PINCTRLUPD1
  8. 0PINCTRLUPD0

PINCTRLSETPin Control Set

Address
0x46D
Reset
0x00
Access
read/write
  1. 7PINCTRLSET7
  2. 6PINCTRLSET6
  3. 5PINCTRLSET5
  4. 4PINCTRLSET4
  5. 3PINCTRLSET3
  6. 2PINCTRLSET2
  7. 1PINCTRLSET1
  8. 0PINCTRLSET0

PINCTRLCLRPin Control Clear

Address
0x46E
Reset
0x00
Access
read/write
  1. 7PINCTRLCLR7
  2. 6PINCTRLCLR6
  3. 5PINCTRLCLR5
  4. 4PINCTRLCLR4
  5. 3PINCTRLCLR3
  6. 2PINCTRLCLR2
  7. 1PINCTRLCLR1
  8. 0PINCTRLCLR0

PIN0CTRLPin 0 Control

Address
0x470
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN1CTRLPin 1 Control

Address
0x471
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN2CTRLPin 2 Control

Address
0x472
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN3CTRLPin 3 Control

Address
0x473
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN4CTRLPin 4 Control

Address
0x474
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN5CTRLPin 5 Control

Address
0x475
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN6CTRLPin 6 Control

Address
0x476
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN7CTRLPin 7 Control

Address
0x477
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6INLVL
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
4 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
INLVL6Input Level Select
  • 0 Schmitt-Trigger input level
  • 1 TTL Input level
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

EVGENCTRLAEvent Generation Control A

Address
0x478
Reset
0x00
Access
read/write
  1. 7–
  2. 6EVGEN1SEL2
  3. 5EVGEN1SEL1
  4. 4EVGEN1SEL0
  5. 3–
  6. 2EVGEN0SEL2
  7. 1EVGEN0SEL1
  8. 0EVGEN0SEL0
2 fields
FieldBitsWhat it does
EVGEN1SEL6:4Event Generator 1 Select
  • 0 Pin 0 used as event generator
  • 1 Pin 1 used as event generator
  • 2 Pin 2 used as event generator
  • 3 Pin 3 used as event generator
  • 4 Pin 4 used as event generator
  • 5 Pin 5 used as event generator
  • 6 Pin 6 used as event generator
  • 7 Pin 7 used as event generator
EVGEN0SEL2:0Event Generator 0 Select
  • 0 Pin 0 used as event generator
  • 1 Pin 1 used as event generator
  • 2 Pin 2 used as event generator
  • 3 Pin 3 used as event generator
  • 4 Pin 4 used as event generator
  • 5 Pin 5 used as event generator
  • 6 Pin 6 used as event generator
  • 7 Pin 7 used as event generator