AVR64EA32 CLKCTRL registers The 12 registers of CLKCTRL (Clock controller), from 0x60, with their reset value and every field. The AVR64EA32 has 492 registers in 43 peripherals, one page each.
CLKCTRL Clock controller MCLKCTRLAMCLK Control A
Address 0x60
Reset 0x00
Access read/write 7 CLKOUT 6 – 5 – 4 – 3 – 2 CLKSEL2 1 CLKSEL1 0 CLKSEL0 2 fields
Field Bits What it does CLKOUT 7 System clock out CLKSEL 2:0 Clock select0 Internal high-frequency oscillator1 Internal 32.768 kHz oscillator2 32.768 kHz crystal oscillator3 External clock
MCLKCTRLBMCLK Control B
Address 0x61
Reset 0x11
Access read/write 7 – 6 – 5 – 4 PDIV3 3 PDIV2 2 PDIV1 1 PDIV0 0 PEN 2 fields
Field Bits What it does PDIV 4:1 Prescaler division0 Divide by 21 Divide by 42 Divide by 83 Divide by 164 Divide by 325 Divide by 648 Divide by 69 Divide by 1010 Divide by 1211 Divide by 2412 Divide by 48 PEN 0 Prescaler enable
MCLKCTRLCMCLK Control C
Address 0x62
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 CFDSRC1 2 CFDSRC0 1 CFDTST 0 CFDEN 3 fields
Field Bits What it does CFDSRC 3:2 CFD Source0 Main Clock1 High Frequency Crystal Oscillator2 32.768 kHz Crystal Oscillator CFDTST 1 CFD Test CFDEN 0 Clock Failure Detect Enable
MCLKINTCTRLMCLK Interrupt Control
Address 0x63
Reset 0x00
Access read/write 7 INTTYPE 6 – 5 – 4 – 3 – 2 – 1 – 0 CFD 2 fields
Field Bits What it does INTTYPE 7 Interrupt Type0 Regular interrupt1 Non-maskable interrupt CFD 0 Interrupt Enable
MCLKINTFLAGSMCLK Interrupt Flags
Address 0x64
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 CFD 1 field
Field Bits What it does CFD 0 Clock Failure Detected
MCLKSTATUSMCLK Status
Address 0x65
Reset 0x00
Access read/write 7 – 6 – 5 – 4 EXTS 3 XOSC32KS 2 OSC32KS 1 OSCHFS 0 SOSC 5 fields
Field Bits What it does EXTS 4 External Clock status / XOSCHF status XOSC32KS 3 32.768 kHz Crystal Oscillator status OSC32KS 2 32KHz oscillator status OSCHFS 1 High frequency oscillator status SOSC 0 System Oscillator changing
MCLKTIMEBASEMCLK Timebase
Address 0x66
Reset 0x00
Access read/write 7 – 6 – 5 – 4 TIMEBASE4 3 TIMEBASE3 2 TIMEBASE2 1 TIMEBASE1 0 TIMEBASE0 1 field
Field Bits What it does TIMEBASE 4:0 Timebase
OSCHFCTRLAOSCHF Control A
Address 0x68
Reset 0x0C
Access read/write 7 RUNSTDBY 6 – 5 – 4 – 3 – 2 – 1 AUTOTUNE1 0 AUTOTUNE0 2 fields
Field Bits What it does RUNSTDBY 7 Run in standby AUTOTUNE 1:0 Automatic Oscillator Tune0 Disabled1 Tune against 32.768 kHz Crystal Oscillator
OSCHFTUNEOSCHF Tune
Address 0x69
Reset 0x00
Access read/write 7 TUNE7 6 TUNE6 5 TUNE5 4 TUNE4 3 TUNE3 2 TUNE2 1 TUNE1 0 TUNE0 1 field
Field Bits What it does TUNE 7:0 Oscillator Tune
OSC32KCTRLAOSC32K Control A
Address 0x78
Reset 0x00
Access read/write 7 RUNSTDBY 6 – 5 – 4 – 3 – 2 – 1 – 0 – 1 field
Field Bits What it does RUNSTDBY 7 Run standby
XOSC32KCTRLAXOSC32K Control A
Address 0x7C
Reset 0x00
Access read/write 7 RUNSTDBY 6 – 5 CSUT1 4 CSUT0 3 – 2 SEL 1 LPMODE 0 ENABLE 5 fields
Field Bits What it does RUNSTDBY 7 Run standby CSUT 5:4 Crystal startup time0 1k cycles1 16k cycles2 32k cycles3 64k cycles SEL 2 Select LPMODE 1 Low power mode ENABLE 0 Enable
XOSCHFCTRLAXOSCHF Control A
Address 0x80
Reset 0x00
Access read/write 7 RUNSTDBY 6 – 5 CSUTHF1 4 CSUTHF0 3 – 2 – 1 SELHF 0 ENABLE 4 fields
Field Bits What it does RUNSTDBY 7 Run in Standby CSUTHF 5:4 Start-Up Time0 256 XOSCHF Cycles1 1K XOSCHF Cycles2 4K XOSCHF Cycles SELHF 1 Source Select0 External Crystal1 Extenal Clock on XTALHF1 pin ENABLE 0 Enable
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