AVR64EA48 TCA1 registers

The 41 registers of TCA1 (16-bit Timer/Counter Type A), from 0xA40, with their reset value and every field. The AVR64EA48 has 550 registers in 47 peripherals, one page each.

TCA1 16-bit Timer/Counter Type A

CTRLAControl A

Address
0xA40
Reset
0x00
Access
read/write
  1. 7RUNSTDBY
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKSEL2
  6. 2CLKSEL1
  7. 1CLKSEL0
  8. 0ENABLE
3 fields
FieldBitsWhat it does
RUNSTDBY7Run in Standby
CLKSEL3:1Clock Selection
  • 0 CLK_PER
  • 1 CLK_PER / 2
  • 2 CLK_PER / 4
  • 3 CLK_PER / 8
  • 4 CLK_PER / 16
  • 5 CLK_PER / 64
  • 6 CLK_PER / 256
  • 7 CLK_PER / 1024
ENABLE0Module Enable

CTRLAControl A

Address
0xA40
Reset
0x00
Access
read/write
  1. 7RUNSTDBY
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKSEL2
  6. 2CLKSEL1
  7. 1CLKSEL0
  8. 0ENABLE
3 fields
FieldBitsWhat it does
RUNSTDBY7Run in Standby
CLKSEL3:1Clock Selection
  • 0 CLK_PER
  • 1 CLK_PER / 2
  • 2 CLK_PER / 4
  • 3 CLK_PER / 8
  • 4 CLK_PER / 16
  • 5 CLK_PER / 64
  • 6 CLK_PER / 256
  • 7 CLK_PER / 1024
ENABLE0Module Enable

CTRLBControl B

Address
0xA41
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2EN
  3. 5CMP1EN
  4. 4CMP0EN
  5. 3ALUPD
  6. 2WGMODE2
  7. 1WGMODE1
  8. 0WGMODE0
5 fields
FieldBitsWhat it does
CMP2EN6Compare 2 Enable
CMP1EN5Compare 1 Enable
CMP0EN4Compare 0 Enable
ALUPD3Auto Lock Update
WGMODE2:0Waveform generation mode
  • 0 Normal Mode
  • 1 Frequency Generation Mode
  • 3 Single Slope PWM
  • 5 Dual Slope PWM, overflow on TOP
  • 6 Dual Slope PWM, overflow on TOP and BOTTOM
  • 7 Dual Slope PWM, overflow on BOTTOM

CTRLBControl B

Address
0xA41
Reset
0x00
Access
read/write
  1. 7–
  2. 6HCMP2EN
  3. 5HCMP1EN
  4. 4HCMP0EN
  5. 3–
  6. 2LCMP2EN
  7. 1LCMP1EN
  8. 0LCMP0EN
6 fields
FieldBitsWhat it does
HCMP2EN6High Compare 2 Enable
HCMP1EN5High Compare 1 Enable
HCMP0EN4High Compare 0 Enable
LCMP2EN2Low Compare 2 Enable
LCMP1EN1Low Compare 1 Enable
LCMP0EN0Low Compare 0 Enable

CTRLCControl C

Address
0xA42
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CMP2OV
  7. 1CMP1OV
  8. 0CMP0OV
3 fields
FieldBitsWhat it does
CMP2OV2Compare 2 Waveform Output Value
CMP1OV1Compare 1 Waveform Output Value
CMP0OV0Compare 0 Waveform Output Value

CTRLCControl C

Address
0xA42
Reset
0x00
Access
read/write
  1. 7–
  2. 6HCMP2OV
  3. 5HCMP1OV
  4. 4HCMP0OV
  5. 3–
  6. 2LCMP2OV
  7. 1LCMP1OV
  8. 0LCMP0OV
6 fields
FieldBitsWhat it does
HCMP2OV6High Compare 2 Output Value
HCMP1OV5High Compare 1 Output Value
HCMP0OV4High Compare 0 Output Value
LCMP2OV2Low Compare 2 Output Value
LCMP1OV1Low Compare 1 Output Value
LCMP0OV0Low Compare 0 Output Value

CTRLDControl D

Address
0xA43
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SPLITM
1 field
FieldBitsWhat it does
SPLITM0Split Mode Enable

CTRLDControl D

Address
0xA43
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SPLITM
1 field
FieldBitsWhat it does
SPLITM0Split Mode Enable

CTRLECLRControl E Clear

Address
0xA44
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1LUPD
  8. 0DIR
3 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset
LUPD1Lock Update
DIR0Direction

CTRLECLRControl E Clear

Address
0xA44
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1CMDEN1
  8. 0CMDEN0
2 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 2 Force Restart
  • 3 Force Hard Reset
CMDEN1:0Command Enable
  • 0 None
  • 3 Both low byte and high byte counter

CTRLESETControl E Set

Address
0xA45
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1LUPD
  8. 0DIR
3 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset
LUPD1Lock Update
DIR0Direction
  • 0 Count up
  • 1 Count down

CTRLESETControl E Set

Address
0xA45
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1CMDEN1
  8. 0CMDEN0
2 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 2 Force Restart
  • 3 Force Hard Reset
CMDEN1:0Command Enable
  • 0 None
  • 3 Both low byte and high byte counter

CTRLFCLRControl F Clear

Address
0xA46
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMP2BV
  6. 2CMP1BV
  7. 1CMP0BV
  8. 0PERBV
4 fields
FieldBitsWhat it does
CMP2BV3Compare 2 Buffer Valid
CMP1BV2Compare 1 Buffer Valid
CMP0BV1Compare 0 Buffer Valid
PERBV0Period Buffer Valid

CTRLFSETControl F Set

Address
0xA47
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMP2BV
  6. 2CMP1BV
  7. 1CMP0BV
  8. 0PERBV
4 fields
FieldBitsWhat it does
CMP2BV3Compare 2 Buffer Valid
CMP1BV2Compare 1 Buffer Valid
CMP0BV1Compare 0 Buffer Valid
PERBV0Period Buffer Valid

EVCTRLEvent Control

Address
0xA49
Reset
0x00
Access
read/write
  1. 7EVACTB2
  2. 6EVACTB1
  3. 5EVACTB0
  4. 4CNTBEI
  5. 3EVACTA2
  6. 2EVACTA1
  7. 1EVACTA0
  8. 0CNTAEI
4 fields
FieldBitsWhat it does
EVACTB7:5Event Action B
  • 0 No Action
  • 3 Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1.
  • 4 Restart counter at positive edge event
  • 5 Restart counter on any edge event
  • 6 Restart counter while event line is 1.
CNTBEI4Count on Event Input B
EVACTA3:1Event Action A
  • 0 Count on positive edge event
  • 1 Count on any edge event
  • 2 Count on prescaled clock while event line is 1.
  • 3 Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1.
CNTAEI0Count on Event Input A

INTCTRLInterrupt Control

Address
0xA4A
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2
  3. 5CMP1
  4. 4CMP0
  5. 3–
  6. 2–
  7. 1–
  8. 0OVF
4 fields
FieldBitsWhat it does
CMP26Compare 2 Interrupt
CMP15Compare 1 Interrupt
CMP04Compare 0 Interrupt
OVF0Overflow Interrupt

INTCTRLInterrupt Control

Address
0xA4A
Reset
0x00
Access
read/write
  1. 7–
  2. 6LCMP2
  3. 5LCMP1
  4. 4LCMP0
  5. 3–
  6. 2–
  7. 1HUNF
  8. 0LUNF
5 fields
FieldBitsWhat it does
LCMP26Low Compare 2 Interrupt Enable
LCMP15Low Compare 1 Interrupt Enable
LCMP04Low Compare 0 Interrupt Enable
HUNF1High Underflow Interrupt Enable
LUNF0Low Underflow Interrupt Enable

INTFLAGSInterrupt Flags

Address
0xA4B
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2
  3. 5CMP1
  4. 4CMP0
  5. 3–
  6. 2–
  7. 1–
  8. 0OVF
4 fields
FieldBitsWhat it does
CMP26Compare 2 Interrupt
CMP15Compare 1 Interrupt
CMP04Compare 0 Interrupt
OVF0Overflow Interrupt

INTFLAGSInterrupt Flags

Address
0xA4B
Reset
0x00
Access
read/write
  1. 7–
  2. 6LCMP2
  3. 5LCMP1
  4. 4LCMP0
  5. 3–
  6. 2–
  7. 1HUNF
  8. 0LUNF
5 fields
FieldBitsWhat it does
LCMP26Low Compare 0 Interrupt Flag
LCMP15Low Compare 1 Interrupt Flag
LCMP04Low Compare 2 Interrupt Flag
HUNF1High Underflow Interrupt Flag
LUNF0Low Underflow Interrupt Flag

DBGCTRLDebug Control

Address
0xA4E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

DBGCTRLDebug Control

Address
0xA4E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

TEMPTemporary data for 16-bit Access

Address
0xA4F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CNTCount

Address
0xA60
Reset
0x0000
Access
read/write
Size
16-bit

LCNTLow Count

Address
0xA60
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCNTHigh Count

Address
0xA61
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LPERLow Period

Address
0xA66
Reset
0xFF
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

PERPeriod

Address
0xA66
Reset
0xFFFF
Access
read/write
Size
16-bit

HPERHigh Period

Address
0xA67
Reset
0xFF
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP0Compare 0

Address
0xA68
Reset
0x0000
Access
read/write
Size
16-bit

LCMP0Low Compare

Address
0xA68
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP0High Compare

Address
0xA69
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP1Compare 1

Address
0xA6A
Reset
0x0000
Access
read/write
Size
16-bit

LCMP1Low Compare

Address
0xA6A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP1High Compare

Address
0xA6B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP2Compare 2

Address
0xA6C
Reset
0x0000
Access
read/write
Size
16-bit

LCMP2Low Compare

Address
0xA6C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP2High Compare

Address
0xA6D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

PERBUFPeriod Buffer

Address
0xA76
Reset
0xFFFF
Access
read/write
Size
16-bit

CMP0BUFCompare 0 Buffer

Address
0xA78
Reset
0x0000
Access
read/write
Size
16-bit

CMP1BUFCompare 1 Buffer

Address
0xA7A
Reset
0x0000
Access
read/write
Size
16-bit

CMP2BUFCompare 2 Buffer

Address
0xA7C
Reset
0x0000
Access
read/write
Size
16-bit