SSP1BUF
- Address
0x18C- Reset
x (not fixed at power-on)- Access
- read/write
- 7SSPBUF7
- 6SSPBUF6
- 5SSPBUF5
- 4SSPBUF4
- 3SSPBUF3
- 2SSPBUF2
- 1SSPBUF1
- 0SSPBUF0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPBUF | 7:0 |
The 20 registers of MSSP (Master synchronous serial port (SPI, I²C)), from 0x18C, with their reset value and every field. The PIC16F18875 has 474 registers in 46 peripherals, one page each.
0x18Cx (not fixed at power-on)| Field | Bits | What it does |
|---|---|---|
| SSPBUF | 7:0 |
0x18D0x00| Field | Bits | What it does |
|---|---|---|
| SSPADD | 7:0 |
0x18E0xFF| Field | Bits | What it does |
|---|---|---|
| SSPMSK | 7:0 |
0x18F0x00| Field | Bits | What it does |
|---|---|---|
| SMP | 7 | SPI Data Input Sample Phase bit |
| CKE | 6 | SPI Clock Edge Select bit |
| D_nA | 5 | Data/Address bit |
| P | 4 | Stop bit |
| S | 3 | Start bit |
| R_nW | 2 | Read/Write Information bit |
| UA | 1 | Update Address bit |
| BF | 0 | Buffer Full Status bit (Receive mode only) |
0x1900x00| Field | Bits | What it does |
|---|---|---|
| WCOL | 7 | Write Collision Detect bit (Transmit mode only) |
| SSPOV | 6 | Receive Overflow Indicator bit |
| SSPEN | 5 | Synchronous Serial Port Enable bit |
| CKP | 4 | Clock Polarity Select bit |
| SSPM | 3:0 | Synchronous Serial Port Mode Select bits |
0x1910x00| Field | Bits | What it does |
|---|---|---|
| GCEN | 7 | General Call Enable bit (Slave mode only) |
| ACKSTAT | 6 | Acknowledge Status bit (Transmission only) |
| ACKDT | 5 | Acknowledge Data bit (Receive mode only) |
| ACKEN | 4 | Acknowledge Sequence Enable bit (Master Receive mode only) |
| RCEN | 3 | Receive Enable bit (Master mode only) |
| PEN | 2 | Stop Condition Enable bit (Master mode only) |
| RSEN | 1 | Repeated Start Condition Enable bit (Master mode only) |
| SEN | 0 | Start Condition Enable/Stretch Enable bit |
0x1920x00| Field | Bits | What it does |
|---|---|---|
| ACKTIM | 7 | |
| PCIE | 6 | |
| SCIE | 5 | |
| BOEN | 4 | |
| SDAHT | 3 | |
| SBCDE | 2 | |
| AHEN | 1 | |
| DHEN | 0 |
0x196x (not fixed at power-on)| Field | Bits | What it does |
|---|---|---|
| SSPBUF | 7:0 |
0x1970x00| Field | Bits | What it does |
|---|---|---|
| SSPADD | 7:0 |
0x1980xFF| Field | Bits | What it does |
|---|---|---|
| SSPMSK | 7:0 |
0x1990x00| Field | Bits | What it does |
|---|---|---|
| SMP | 7 | SPI Data Input Sample Phase bit |
| CKE | 6 | SPI Clock Edge Select bit |
| D_nA | 5 | Data/Address bit |
| P | 4 | Stop bit |
| S | 3 | Start bit |
| R_nW | 2 | Read/Write Information bit |
| UA | 1 | Update Address bit |
| BF | 0 | Buffer Full Status bit (Receive mode only) |
0x19A0x00| Field | Bits | What it does |
|---|---|---|
| WCOL | 7 | Write Collision Detect bit (Transmit mode only) |
| SSPOV | 6 | Receive Overflow Indicator bit |
| SSPEN | 5 | Synchronous Serial Port Enable bit |
| CKP | 4 | Clock Polarity Select bit |
| SSPM | 3:0 | Synchronous Serial Port Mode Select bits |
0x19B0x00| Field | Bits | What it does |
|---|---|---|
| GCEN | 7 | General Call Enable bit (Slave mode only) |
| ACKSTAT | 6 | Acknowledge Status bit (Transmission only) |
| ACKDT | 5 | Acknowledge Data bit (Receive mode only) |
| ACKEN | 4 | Acknowledge Sequence Enable bit (Master Receive mode only) |
| RCEN | 3 | Receive Enable bit (Master mode only) |
| PEN | 2 | Stop Condition Enable bit (Master mode only) |
| RSEN | 1 | Repeated Start Condition Enable bit (Master mode only) |
| SEN | 0 | Start Condition Enable/Stretch Enable bit |
0x19C0x00| Field | Bits | What it does |
|---|---|---|
| ACKTIM | 7 | |
| PCIE | 6 | |
| SCIE | 5 | |
| BOEN | 4 | |
| SDAHT | 3 | |
| SBCDE | 2 | |
| AHEN | 1 | |
| DHEN | 0 |
0xEC50x13| Field | Bits | What it does |
|---|---|---|
| SSP1CLKPPS4 | 4 | |
| SSP1CLKPPS3 | 3 | |
| SSP1CLKPPS2 | 2 | |
| SSP1CLKPPS1 | 1 | |
| SSP1CLKPPS0 | 0 |
0xEC60x14| Field | Bits | What it does |
|---|---|---|
| SSP1DATPPS4 | 4 | |
| SSP1DATPPS3 | 3 | |
| SSP1DATPPS2 | 2 | |
| SSP1DATPPS1 | 1 | |
| SSP1DATPPS0 | 0 |
0xEC70x05| Field | Bits | What it does |
|---|---|---|
| SSP1SSPPS4 | 4 | |
| SSP1SSPPS3 | 3 | |
| SSP1SSPPS2 | 2 | |
| SSP1SSPPS1 | 1 | |
| SSP1SSPPS0 | 0 |
0xEC80x09| Field | Bits | What it does |
|---|---|---|
| SSP2CLKPPS4 | 4 | |
| SSP2CLKPPS3 | 3 | |
| SSP2CLKPPS2 | 2 | |
| SSP2CLKPPS1 | 1 | |
| SSP2CLKPPS0 | 0 |
0xEC90x0A| Field | Bits | What it does |
|---|---|---|
| SSP2DATPPS4 | 4 | |
| SSP2DATPPS3 | 3 | |
| SSP2DATPPS2 | 2 | |
| SSP2DATPPS1 | 1 | |
| SSP2DATPPS0 | 0 |
0xECA0x08| Field | Bits | What it does |
|---|---|---|
| SSP2SSPPS4 | 4 | |
| SSP2SSPPS3 | 3 | |
| SSP2SSPPS2 | 2 | |
| SSP2SSPPS1 | 1 | |
| SSP2SSPPS0 | 0 |