PIC16LF1776 CWG3 registers The 19 registers of CWG3 (Complementary waveform generator 3), from 0x80D, with their reset value and every field. The PIC16LF1776 has 473 registers in 54 peripherals, one page each.
CWG3 Complementary waveform generator 3 COG3PHR
Address 0x80D
Reset 0x00
Access read/write 7 – 6 – 5 PHR5 4 PHR4 3 PHR3 2 PHR2 1 PHR1 0 PHR0 1 field
Field Bits What it does PHR 5:0
COG3PHF
Address 0x80E
Reset 0x00
Access read/write 7 – 6 – 5 PHF5 4 PHF4 3 PHF3 2 PHF2 1 PHF1 0 PHF0 1 field
Field Bits What it does PHF 5:0
COG3BLKR
Address 0x80F
Reset 0x00
Access read/write 7 – 6 – 5 BLKR5 4 BLKR4 3 BLKR3 2 BLKR2 1 BLKR1 0 BLKR0 1 field
Field Bits What it does BLKR 5:0
COG3BLKF
Address 0x810
Reset 0x00
Access read/write 7 – 6 – 5 BLKF5 4 BLKF4 3 BLKF3 2 BLKF2 1 BLKF1 0 BLKF0 1 field
Field Bits What it does BLKF 5:0
COG3DBR
Address 0x811
Reset 0x00
Access read/write 7 – 6 – 5 DBR5 4 DBR4 3 DBR3 2 DBR2 1 DBR1 0 DBR0 1 field
Field Bits What it does DBR 5:0
COG3DBF
Address 0x812
Reset 0x00
Access read/write 7 – 6 – 5 DBF5 4 DBF4 3 DBF3 2 DBF2 1 DBF1 0 DBF0 6 fields
Field Bits What it does DBF5 5 DBF4 4 DBF3 3 DBF2 2 DBF1 1 DBF0 0
COG3CON0
Address 0x813
Reset 0x00
Access read/write 7 EN 6 LD 5 – 4 CS1 3 CS0 2 MD2 1 MD1 0 MD0 4 fields
Field Bits What it does EN 7 LD 6 CS 4:3 MD 2:0
COG3CON1
Address 0x814
Reset 0x00
Access read/write 7 RDBS 6 FDBS 5 – 4 – 3 POLD 2 POLC 1 POLB 0 POLA 6 fields
Field Bits What it does RDBS 7 FDBS 6 POLD 3 POLC 2 POLB 1 POLA 0
COG3RIS0
Address 0x815
Reset 0x00
Access read/write 7 RIS7 6 RIS6 5 RIS5 4 RIS4 3 RIS3 2 RIS2 1 RIS1 0 RIS0 8 fields
Field Bits What it does RIS7 7 RIS6 6 RIS5 5 RIS4 4 RIS3 3 RIS2 2 RIS1 1 RIS0 0
COG3RIS1
Address 0x816
Reset 0x00
Access read/write 7 RIS15 6 RIS14 5 RIS13 4 RIS12 3 RIS11 2 – 1 RIS9 0 – 6 fields
Field Bits What it does RIS15 7 RIS14 6 RIS13 5 RIS12 4 RIS11 3 RIS9 1
COG3RSIM0
Address 0x817
Reset 0x00
Access read/write 7 RSIM7 6 RSIM6 5 RSIM5 4 RSIM4 3 RSIM3 2 RSIM2 1 RSIM1 0 RSIM0 8 fields
Field Bits What it does RSIM7 7 RSIM6 6 RSIM5 5 RSIM4 4 RSIM3 3 RSIM2 2 RSIM1 1 RSIM0 0
COG3RSIM1
Address 0x818
Reset 0x00
Access read/write 7 RSIM15 6 RSIM14 5 RSIM13 4 RSIM12 3 RSIM11 2 – 1 RSIM9 0 – 6 fields
Field Bits What it does RSIM15 7 RSIM14 6 RSIM13 5 RSIM12 4 RSIM11 3 RSIM9 1
COG3FIS0
Address 0x819
Reset 0x00
Access read/write 7 FIS7 6 FIS6 5 FIS5 4 FIS4 3 FIS3 2 FIS2 1 FIS1 0 FIS0 8 fields
Field Bits What it does FIS7 7 FIS6 6 FIS5 5 FIS4 4 FIS3 3 FIS2 2 FIS1 1 FIS0 0
COG3FIS1
Address 0x81A
Reset 0x00
Access read/write 7 FIS15 6 FIS14 5 FIS13 4 FIS12 3 FIS11 2 – 1 FIS9 0 – 6 fields
Field Bits What it does FIS15 7 FIS14 6 FIS13 5 FIS12 4 FIS11 3 FIS9 1
COG3FSIM0
Address 0x81B
Reset 0x00
Access read/write 7 FSIM7 6 FSIM6 5 FSIM5 4 FSIM4 3 FSIM3 2 FSIM2 1 FSIM1 0 FSIM0 8 fields
Field Bits What it does FSIM7 7 FSIM6 6 FSIM5 5 FSIM4 4 FSIM3 3 FSIM2 2 FSIM1 1 FSIM0 0
COG3FSIM1
Address 0x81C
Reset 0x00
Access read/write 7 FSIM15 6 FSIM14 5 FSIM13 4 FSIM12 3 FSIM11 2 – 1 FSIM9 0 – 6 fields
Field Bits What it does FSIM15 7 FSIM14 6 FSIM13 5 FSIM12 4 FSIM11 3 FSIM9 1
COG3ASD0
Address 0x81D
Reset 0x14
Access read/write 7 ASE 6 ASREN 5 ASDBD1 4 ASDBD0 3 ASDAC1 2 ASDAC0 1 – 0 – 4 fields
Field Bits What it does ASE 7 ASREN 6 ASDBD 5:4 ASDAC 3:2
COG3ASD1
Address 0x81E
Reset 0x00
Access read/write 7 AS7E 6 AS6E 5 AS5E 4 AS4E 3 AS3E 2 AS2E 1 AS1E 0 AS0E 8 fields
Field Bits What it does AS7E 7 AS6E 6 AS5E 5 AS4E 4 AS3E 3 AS2E 2 AS1E 1 AS0E 0
COG3STR
Address 0x81F
Reset 0x00
Access read/write 7 SDATD 6 SDATC 5 SDATB 4 SDATA 3 STRD 2 STRC 1 STRB 0 STRA 8 fields
Field Bits What it does SDATD 7 SDATC 6 SDATB 5 SDATA 4 STRD 3 STRC 2 STRB 1 STRA 0
BETA