PIC18F16Q20 SPI1 registers The 13 registers of SPI1 (SPI 1), from 0x1D7, with their reset value and every field. The PIC18F16Q20 has 614 registers in 39 peripherals, one page each.
SPI1 SPI 1 7 RXB7 6 RXB6 5 RXB5 4 RXB4 3 RXB3 2 RXB2 1 RXB1 0 RXB0 1 field
Field Bits What it does RXB 7:0
7 TXB7 6 TXB6 5 TXB5 4 TXB4 3 TXB3 2 TXB2 1 TXB1 0 TXB0 1 field
Field Bits What it does TXB 7:0
SPI1TCNTL
Address 0x1D9
Reset 0x00
Access read/write 7 TCNTL7 6 TCNTL6 5 TCNTL5 4 TCNTL4 3 TCNTL3 2 TCNTL2 1 TCNTL1 0 TCNTL0 1 field
Field Bits What it does TCNTL 7:0
SPI1TCNTH
Address 0x1DA
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 TCNTH2 1 TCNTH1 0 TCNTH0 1 field
Field Bits What it does TCNTH 2:0
SPI1CON0
Address 0x1DB
Reset 0x00
Access read/write 7 EN 6 – 5 – 4 – 3 – 2 LSBF 1 MST 0 BMODE 4 fields
Field Bits What it does EN 7 LSBF 2 MST 1 BMODE 0
SPI1CON1
Address 0x1DC
Reset 0x04
Access read/write 7 SMP 6 CKE 5 CKP 4 FST 3 – 2 SSP 1 SDIP 0 SDOP 7 fields
Field Bits What it does SMP 7 CKE 6 CKP 5 FST 4 SSP 2 SDIP 1 SDOP 0
SPI1CON2
Address 0x1DD
Reset 0x00
Access read/write 7 BUSY 6 SSFLT 5 – 4 – 3 – 2 SSET 1 TXR 0 RXR 5 fields
Field Bits What it does BUSY 7 SSFLT 6 SSET 2 TXR 1 RXR 0
SPI1STATUS
Address 0x1DE
Reset 0x20
Access read/write 7 TXWE 6 – 5 TXBE 4 – 3 RXRE 2 CLRBF 1 – 0 RXBF 5 fields
Field Bits What it does TXWE 7 TXBE 5 RXRE 3 CLRBF 2 RXBF 0
SPI1TWIDTH
Address 0x1DF
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 TWIDTH2 1 TWIDTH1 0 TWIDTH0 1 field
Field Bits What it does TWIDTH 2:0
SPI1BAUD
Address 0x1E0
Reset 0x00
Access read/write 7 BAUD7 6 BAUD6 5 BAUD5 4 BAUD4 3 BAUD3 2 BAUD2 1 BAUD1 0 BAUD0 1 field
Field Bits What it does BAUD 7:0
SPI1INTF
Address 0x1E1
Reset 0x00
Access read/write 7 SRMTIF 6 TCZIF 5 SOSIF 4 EOSIF 3 – 2 RXOIF 1 TXUIF 0 – 6 fields
Field Bits What it does SRMTIF 7 TCZIF 6 SOSIF 5 EOSIF 4 RXOIF 2 TXUIF 1
SPI1INTE
Address 0x1E2
Reset 0x00
Access read/write 7 SRMTIE 6 TCZIE 5 SOSIE 4 EOSIE 3 – 2 RXOIE 1 TXUIE 0 – 6 fields
Field Bits What it does SRMTIE 7 TCZIE 6 SOSIE 5 EOSIE 4 RXOIE 2 TXUIE 1
SPI1CLK
Address 0x1E3
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 CLKSEL3 2 CLKSEL2 1 CLKSEL1 0 CLKSEL0 1 field
Field Bits What it does CLKSEL 3:0
BETA