BETACLC1CONConfigurable logic cell control
- Address
0xE27- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
PIC18F47Q10 CLC registers
The 81 registers of CLC (Configurable logic cell ), from 0xE27, with their reset value and every field. The PIC18F47Q10 has 462 registers in 38 peripherals, one page each.
CLC Configurable logic cell
CLC1POLPolarity control
- Address
0xE28- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC1SEL0Input select register 1
- Address
0xE29- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC1SEL1Input select register 1
- Address
0xE2A- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC1SEL2Input select register 1
- Address
0xE2B- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC1SEL3Input select register 1
- Address
0xE2C- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC1GLS0Gate logic select register 0
- Address
0xE2D- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC1GLS1Gate logic select register 1
- Address
0xE2E- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC1GLS2Gate logic select register 2
- Address
0xE2F- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC1GLS3Gate logic select register 3
- Address
0xE30- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC2CONConfigurable logic cell control
- Address
0xE31- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC2POLPolarity control
- Address
0xE32- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC2SEL0Input select register 1
- Address
0xE33- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC2SEL1Input select register 1
- Address
0xE34- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC2SEL2Input select register 1
- Address
0xE35- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC2SEL3Input select register 1
- Address
0xE36- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC2GLS0Gate logic select register 0
- Address
0xE37- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC2GLS1Gate logic select register 1
- Address
0xE38- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC2GLS2Gate logic select register 2
- Address
0xE39- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC2GLS3Gate logic select register 3
- Address
0xE3A- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC3CONConfigurable logic cell control
- Address
0xE3B- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC3POLPolarity control
- Address
0xE3C- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC3SEL0Input select register 1
- Address
0xE3D- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC3SEL1Input select register 1
- Address
0xE3E- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC3SEL2Input select register 1
- Address
0xE3F- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC3SEL3Input select register 1
- Address
0xE40- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC3GLS0Gate logic select register 0
- Address
0xE41- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC3GLS1Gate logic select register 1
- Address
0xE42- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC3GLS2Gate logic select register 2
- Address
0xE43- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC3GLS3Gate logic select register 3
- Address
0xE44- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC4CONConfigurable logic cell control
- Address
0xE45- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC4POLPolarity control
- Address
0xE46- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC4SEL0Input select register 1
- Address
0xE47- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC4SEL1Input select register 1
- Address
0xE48- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC4SEL2Input select register 1
- Address
0xE49- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC4SEL3Input select register 1
- Address
0xE4A- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC4GLS0Gate logic select register 0
- Address
0xE4B- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC4GLS1Gate logic select register 1
- Address
0xE4C- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC4GLS2Gate logic select register 2
- Address
0xE4D- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC4GLS3Gate logic select register 3
- Address
0xE4E- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC5CONConfigurable logic cell control
- Address
0xE4F- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC5POLPolarity control
- Address
0xE50- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC5SEL0Input select register 1
- Address
0xE51- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC5SEL1Input select register 1
- Address
0xE52- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC5SEL2Input select register 1
- Address
0xE53- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC5SEL3Input select register 1
- Address
0xE54- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC5GLS0Gate logic select register 0
- Address
0xE55- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC5GLS1Gate logic select register 1
- Address
0xE56- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC5GLS2Gate logic select register 2
- Address
0xE57- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC5GLS3Gate logic select register 3
- Address
0xE58- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC6CONConfigurable logic cell control
- Address
0xE59- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC6POLPolarity control
- Address
0xE5A- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC6SEL0Input select register 1
- Address
0xE5B- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC6SEL1Input select register 1
- Address
0xE5C- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC6SEL2Input select register 1
- Address
0xE5D- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC6SEL3Input select register 1
- Address
0xE5E- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC6GLS0Gate logic select register 0
- Address
0xE5F- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC6GLS1Gate logic select register 1
- Address
0xE60- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC6GLS2Gate logic select register 2
- Address
0xE61- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC6GLS3Gate logic select register 3
- Address
0xE62- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC7CONConfigurable logic cell control
- Address
0xE63- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC7POLPolarity control
- Address
0xE64- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC7SEL0Input select register 1
- Address
0xE65- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC7SEL1Input select register 1
- Address
0xE66- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC7SEL2Input select register 1
- Address
0xE67- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC7SEL3Input select register 1
- Address
0xE68- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC7GLS0Gate logic select register 0
- Address
0xE69- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC7GLS1Gate logic select register 1
- Address
0xE6A- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC7GLS2Gate logic select register 2
- Address
0xE6B- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC7GLS3Gate logic select register 3
- Address
0xE6C- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLC8CONConfigurable logic cell control
- Address
0xE6D- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4INTP
- 3INTN
- 2MODE2
- 1MODE1
- 0MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| INTP | 4 | |
| INTN | 3 | |
| MODE | 2:0 |
CLC8POLPolarity control
- Address
0xE6E- Reset
x (not fixed at power-on)- Access
- read/write
- 7POL
- 6–
- 5–
- 4–
- 3G4POL
- 2G3POL
- 1G2POL
- 0G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| POL | 7 | |
| G4POL | 3 | |
| G3POL | 2 | |
| G2POL | 1 | |
| G1POL | 0 |
CLC8SEL0Input select register 1
- Address
0xE6F- Reset
x (not fixed at power-on)- Access
- read/write
- 7D1S7
- 6D1S6
- 5D1S5
- 4D1S4
- 3D1S3
- 2D1S2
- 1D1S1
- 0D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D1S | 7:0 |
CLC8SEL1Input select register 1
- Address
0xE70- Reset
x (not fixed at power-on)- Access
- read/write
- 7D2S7
- 6D2S6
- 5D2S5
- 4D2S4
- 3D2S3
- 2D2S2
- 1D2S1
- 0D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D2S | 7:0 |
CLC8SEL2Input select register 1
- Address
0xE71- Reset
x (not fixed at power-on)- Access
- read/write
- 7D3S7
- 6D3S6
- 5D3S5
- 4D3S4
- 3D3S3
- 2D3S2
- 1D3S1
- 0D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D3S | 7:0 |
CLC8SEL3Input select register 1
- Address
0xE72- Reset
x (not fixed at power-on)- Access
- read/write
- 7D4S7
- 6D4S6
- 5D4S5
- 4D4S4
- 3D4S3
- 2D4S2
- 1D4S1
- 0D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| D4S | 7:0 |
CLC8GLS0Gate logic select register 0
- Address
0xE73- Reset
x (not fixed at power-on)- Access
- read/write
- 7G1D4T
- 6G1D4N
- 5G1D3T
- 4G1D3N
- 3G1D2T
- 2G1D2N
- 1G1D1T
- 0G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1D4T | 7 | |
| G1D4N | 6 | |
| G1D3T | 5 | |
| G1D3N | 4 | |
| G1D2T | 3 | |
| G1D2N | 2 | |
| G1D1T | 1 | |
| G1D1N | 0 |
CLC8GLS1Gate logic select register 1
- Address
0xE74- Reset
x (not fixed at power-on)- Access
- read/write
- 7G2D4T
- 6G2D4N
- 5G2D3T
- 4G2D3N
- 3G2D2T
- 2G2D2N
- 1G2D1T
- 0G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G2D4T | 7 | |
| G2D4N | 6 | |
| G2D3T | 5 | |
| G2D3N | 4 | |
| G2D2T | 3 | |
| G2D2N | 2 | |
| G2D1T | 1 | |
| G2D1N | 0 |
CLC8GLS2Gate logic select register 2
- Address
0xE75- Reset
x (not fixed at power-on)- Access
- read/write
- 7G3D4T
- 6G3D4N
- 5G3D3T
- 4G3D3N
- 3G3D2T
- 2G3D2N
- 1G3D1T
- 0G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G3D4T | 7 | |
| G3D4N | 6 | |
| G3D3T | 5 | |
| G3D3N | 4 | |
| G3D2T | 3 | |
| G3D2N | 2 | |
| G3D1T | 1 | |
| G3D1N | 0 |
CLC8GLS3Gate logic select register 3
- Address
0xE76- Reset
x (not fixed at power-on)- Access
- read/write
- 7G4D4T
- 6G4D4N
- 5G4D3T
- 4G4D3N
- 3G4D2T
- 2G4D2N
- 1G4D1T
- 0G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| G4D4T | 7 | |
| G4D4N | 6 | |
| G4D3T | 5 | |
| G4D3N | 4 | |
| G4D2T | 3 | |
| G4D2N | 2 | |
| G4D1T | 1 | |
| G4D1N | 0 |
CLCDATA
- Address
0xE77- Reset
x (not fixed at power-on)- Access
- read/write
- 7MLC8OUT
- 6MLC7OUT
- 5MLC6OUT
- 4MLC5OUT
- 3MLC4OUT
- 2MLC3OUT
- 1MLC2OUT
- 0MCL1OUT
8 fields
| Field | Bits | What it does |
|---|---|---|
| MLC8OUT | 7 | |
| MLC7OUT | 6 | |
| MLC6OUT | 5 | |
| MLC5OUT | 4 | |
| MLC4OUT | 3 | |
| MLC3OUT | 2 | |
| MLC2OUT | 1 | |
| MCL1OUT | 0 |