PIC18LF27K42 DMA2 registers

The 23 registers of DMA2 (DMA 2), from 0x3BC9, with their reset value and every field. The PIC18LF27K42 has 608 registers in 53 peripherals, one page each.

DMA2 DMA 2

DMA2BUF

Address: 0x3BC9
Reset: x (not fixed at power-on)
Access: read only

7BUF7
6BUF6
5BUF5
4BUF4
3BUF3
2BUF2
1BUF1
0BUF0

1 field

Field	Bits	What it does
BUF	7:0

DMA2DCNTL

Address: 0x3BCA
Reset: 0x00
Access: read only

7DCNT7
6DCNT6
5DCNT5
4DCNT4
3DCNT3
2DCNT2
1DCNT1
0DCNT0

1 field

Field	Bits	What it does
DCNT	7:0

DMA2DCNTH

Address: 0x3BCB
Reset: 0x00
Access: read only

7–
6–
5–
4–
3DCNT3
2DCNT2
1DCNT1
0DCNT0

1 field

Field	Bits	What it does
DCNT	3:0

DMA2DPTRL

Address: 0x3BCC
Reset: 0x00
Access: read only

7DPTR7
6DPTR6
5DPTR5
4DPTR4
3DPTR3
2DPTR2
1DPTR1
0DPTR0

1 field

Field	Bits	What it does
DPTR	7:0

DMA2DPTRH

Address: 0x3BCD
Reset: 0x00
Access: read only

7DPTR7
6DPTR6
5DPTR5
4DPTR4
3DPTR3
2DPTR2
1DPTR1
0DPTR0

1 field

Field	Bits	What it does
DPTR	7:0

DMA2DSZL

Address: 0x3BCE
Reset: x (not fixed at power-on)
Access: read/write

7DSZ7
6DSZ6
5DSZ5
4DSZ4
3DSZ3
2DSZ2
1DSZ1
0DSZ0

1 field

Field	Bits	What it does
DSZ	7:0

DMA2DSZH

Address: 0x3BCF
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3DSZ3
2DSZ2
1DSZ1
0DSZ0

1 field

Field	Bits	What it does
DSZ	3:0

DMA2DSAL

Address: 0x3BD0
Reset: 0x00
Access: read/write

7DSA7
6DSA6
5DSA5
4DSA4
3DSA3
2DSA2
1DSA1
0DSA0

1 field

Field	Bits	What it does
DSA	7:0

DMA2DSAH

Address: 0x3BD1
Reset: 0x00
Access: read/write

7DSA7
6DSA6
5DSA5
4DSA4
3DSA3
2DSA2
1DSA1
0DSA0

1 field

Field	Bits	What it does
DSA	7:0

DMA2SCNTL

Address: 0x3BD2
Reset: 0x00
Access: read only

7SCNT7
6SCNT6
5SCNT5
4SCNT4
3SCNT3
2SCNT2
1SCNT1
0SCNT0

1 field

Field	Bits	What it does
SCNT	7:0

DMA2SCNTH

Address: 0x3BD3
Reset: 0x00
Access: read only

7–
6–
5–
4–
3SCNT3
2SCNT2
1SCNT1
0SCNT0

1 field

Field	Bits	What it does
SCNT	3:0

DMA2SPTRL

Address: 0x3BD4
Reset: 0x00
Access: read only

7SPTR7
6SPTR6
5SPTR5
4SPTR4
3SPTR3
2SPTR2
1SPTR1
0SPTR0

1 field

Field	Bits	What it does
SPTR	7:0

DMA2SPTRH

Address: 0x3BD5
Reset: 0x00
Access: read only

7SPTR7
6SPTR6
5SPTR5
4SPTR4
3SPTR3
2SPTR2
1SPTR1
0SPTR0

1 field

Field	Bits	What it does
SPTR	7:0

DMA2SPTRU

Address: 0x3BD6
Reset: 0x00
Access: read only

7–
6–
5SPTR5
4SPTR4
3SPTR3
2SPTR2
1SPTR1
0SPTR0

1 field

Field	Bits	What it does
SPTR	5:0

DMA2SSZL

Address: 0x3BD7
Reset: 0x00
Access: read/write

7SSZ7
6SSZ6
5SSZ5
4SSZ4
3SSZ3
2SSZ2
1SSZ1
0SSZ0

1 field

Field	Bits	What it does
SSZ	7:0

DMA2SSZH

Address: 0x3BD8
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3SSZ3
2SSZ2
1SSZ1
0SSZ0

1 field

Field	Bits	What it does
SSZ	3:0

DMA2SSAL

Address: 0x3BD9
Reset: 0x00
Access: read/write

7SSA7
6SSA6
5SSA5
4SSA4
3SSA3
2SSA2
1SSA1
0SSA0

1 field

Field	Bits	What it does
SSA	7:0

DMA2SSAH

Address: 0x3BDA
Reset: 0x00
Access: read/write

7SSA7
6SSA6
5SSA5
4SSA4
3SSA3
2SSA2
1SSA1
0SSA0

1 field

Field	Bits	What it does
SSA	7:0

DMA2SSAU

Address: 0x3BDB
Reset: 0x00
Access: read/write

7–
6–
5SSA5
4SSA4
3SSA3
2SSA2
1SSA1
0SSA0

1 field

Field	Bits	What it does
SSA	5:0

DMA2CON0

Address: 0x3BDC
Reset: 0x00
Access: read/write

7EN
6SIRQEN
5DGO
4–
3–
2AIRQEN
1–
0XIP

5 fields

Field	Bits	What it does
EN	7
SIRQEN	6
DGO	5
AIRQEN	2
XIP	0

DMA2CON1

Address: 0x3BDD
Reset: 0x00
Access: read/write

7DMODE1
6DMODE0
5DSTP
4SMR1
3SMR0
2SMODE1
1SMODE0
0SSTP

5 fields

Field	Bits	What it does
DMODE	7:6
DSTP	5
SMR	4:3
SMODE	2:1
SSTP	0

DMA2AIRQ

Address: 0x3BDE
Reset: 0x00
Access: read/write

7–
6AIRQ6
5AIRQ5
4AIRQ4
3AIRQ3
2AIRQ2
1AIRQ1
0AIRQ0

1 field

Field	Bits	What it does
AIRQ	6:0

DMA2SIRQ

Address: 0x3BDF
Reset: 0x00
Access: read/write

7–
6SIRQ6
5SIRQ5
4SIRQ4
3SIRQ3
2SIRQ2
1SIRQ1
0SIRQ0

1 field

Field	Bits	What it does
SIRQ	6:0