PIC32CK0512SG00064 OSC32KCTRL registers

The 8 registers of OSC32KCTRL (32kHz Oscillators Control), from 0x4400E000, with their reset value and every field. The PIC32CK0512SG00064 has 5841 registers in 73 peripherals, one page each.

OSC32KCTRL 32kHz Oscillators Control

INTENCLRInterrupt Enable Clear

Address
0x4400E000
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
XOSC32KFAIL2XOSC32K Clock Failure Detector Interrupt Enable
XOSC32KRDY0XOSC32K Ready Interrupt Enable

INTENSETInterrupt Enable Set

Address
0x4400E004
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
XOSC32KFAIL2XOSC32K Clock Failure Detector Interrupt Enable
XOSC32KRDY0XOSC32K Ready Interrupt Enable

INTFLAGInterrupt Flag Status and Clear

Address
0x4400E008
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
XOSC32KFAIL2XOSC32K Clock Failure Detector
XOSC32KRDY0XOSC32K Ready

STATUSPower and Clocks Status

Address
0x4400E00C
Reset
0x00000000
Access
read only
Size
32-bit
3 fields
FieldBitsWhat it does
XOSC32KSW3XOSC32K Clock switch
XOSC32KFAIL2XOSC32K Clock Failure Detector
XOSC32KRDY0XOSC32K Ready

CLKSELCTRLClock Selection Control

Address
0x4400E010
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
HSMSEL5:4HSM Clock Selection
  • 0 32.768kHz from 32kHz internal ULP oscillator
  • 2 32.768kHz from 32.768kHz external crystal oscillator
RTCSEL1:0RTC Clock Selection
  • 0 32.768kHz from 32kHz internal ULP oscillator
  • 1 1.024kHz from 32kHz internal ULP oscillator
  • 2 32.768kHz from 32.768kHz external crystal oscillator
  • 3 1.024kHz from 32.768kHz internal oscillator

CFDCTRLClock Failure Detector Control

Address
0x4400E014
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
CFDPRESC2Clock Failure Detector Prescaler
SWBACK1Clock Switch Back
CFDEN0Clock Failure Detector Enable

EVCTRLEvent Control

Address
0x4400E018
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
CFDEO0Clock Failure Detector Event Output Enable

XOSC32K32kHz External Crystal Oscillator (XOSC32K) Control

Address
0x4400E01C
Reset
0x00200080
Access
read/write
Size
32-bit
5 fields
FieldBitsWhat it does
CGM21:18Control Gain Mode
  • 0 The lower Control Gain Mode value
  • 1 A higher Control Gain Mode value than CGM0
  • 2 A higher Control Gain Mode value than CGM1
  • 3 A higher Control Gain Mode value than CGM2
  • 4 A higher Control Gain Mode value than CGM3
  • 5 A higher Control Gain Mode value than CGM4
  • 6 A higher Control Gain Mode value than CGM5
  • 7 A higher Control Gain Mode value than CGM6
  • 8 A higher Control Gain Mode value than CGM7
  • 9 A higher Control Gain Mode value than CGM8
  • 10 A higher Control Gain Mode value than CGM9
  • 11 A higher Control Gain Mode value than CGM10
  • 12 A higher Control Gain Mode value than CGM11
  • 13 A higher Control Gain Mode value than CGM12
  • 14 A higher Control Gain Mode value than CGM13
  • 15 The highest Control Gain Mode value
STARTUP11:8Startup Mode
  • 0 1 ULP clock cycle
  • 1 16 ULP clock cycles
  • 2 32 ULP clock cycles
  • 3 2048 ULP clock cycles
  • 4 4096 ULP clock cycles
  • 5 8192 ULP clock cycles
  • 6 16384 ULP clock cycles
  • 7 32768 ULP clock cycles
  • 8 65536 ULP clock cycles
  • 9 131072 ULP clock cycles
  • 10 262144 ULP clock cycles
ONDEMAND7On Demand Mode
XTALEN2Crystal Oscillator Enable
ENABLE1Oscillator Enable