PIC32CK0512SG01064 PM registers

The 7 registers of PM (Power Manager), from 0x44006000, with their reset value and every field. The PIC32CK0512SG01064 has 6050 registers in 76 peripherals, one page each.

PM Power Manager

CTRLAControl A

Address
0x44006000
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2IORET
  7. 1–
  8. 0–
1 field
FieldBitsWhat it does
IORET2I/O Retention
  • 0 When the device exits the HIBERNATE or BACKUP mode, the I/O line configuration are released.
  • 1 When the device exits the HIBERNATE or BACKUP mode, the I/O line configuration are stretched.

SLEEPCFGSleep Configuration

Address
0x44006001
Reset
0x02
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SLEEPMODE2
  7. 1SLEEPMODE1
  8. 0SLEEPMODE0
1 field
FieldBitsWhat it does
SLEEPMODE2:0Sleep Mode
  • 2 CPU, AHB and APB clocks are OFF
  • 4 All Clocks are OFF
  • 5 Backup domain is ON as well as some PDRAMs
  • 6 Only Backup domain is powered ON
  • 7 All power domains are powered OFF

INTENCLRInterrupt Enable Clear

Address
0x44006004
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SLEEPRDY
1 field
FieldBitsWhat it does
SLEEPRDY0Backup Sleep Mode Entry Ready Enable

INTENSETInterrupt Enable Set

Address
0x44006005
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SLEEPRDY
1 field
FieldBitsWhat it does
SLEEPRDY0Backup Sleep Mode Entry Ready Enable

INTFLAGInterrupt Flag Status and Clear

Address
0x44006006
Reset
0x01
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SLEEPRDY
1 field
FieldBitsWhat it does
SLEEPRDY0Backup Sleep Mode Entry Ready

STDBYCFGStandby Configuration

Address
0x44006008
Reset
0x04
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2LPRAM
  7. 1–
  8. 0RAMCFG
2 fields
FieldBitsWhat it does
LPRAM2Low Power RAM Enable
RAMCFG0Ram Configuration
  • 0 All the RAMs are retained
  • 1 Only the first 32K bytes are retained

HIBCFGHibernate Configuration

Address
0x44006009
Reset
0x04
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2LPRAM
  7. 1–
  8. 0RAMCFG
2 fields
FieldBitsWhat it does
LPRAM2Low Power RAM Enable
RAMCFG0Ram Configuration
  • 0 All the RAMs are retained
  • 1 Only the first 32K bytes are retained