PIC32CK1025SG01100 SDMMC0 registers

The 45 registers of SDMMC0 (SD/MMC Host Controller), from 0x45026000, with their reset value and every field. The PIC32CK1025SG01100 has 6232 registers in 78 peripherals, one page each.

SDMMC0 SD/MMC Host Controller

SSARSDMA System Address / Argument 2

Address
0x45026000
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
ADDR31:0SDMA System Address
ARG231:0Argument 2

BSRBlock Size

Address
0x45026004
Reset
0x0000
Access
read/write
Size
16-bit
2 fields
FieldBitsWhat it does
BOUNDARY14:12SDMA Buffer Boundary
  • 0 4k bytes
  • 1 8k bytes
  • 2 16k bytes
  • 3 32k bytes
  • 4 64k bytes
  • 5 128k bytes
  • 6 256k bytes
  • 7 512k bytes
BLOCKSIZE9:0Transfer Block Size

BCRBlock Count

Address
0x45026006
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
BLKCNT15:0Blocks Count for Current Transfer

ARG1RArgument 1

Address
0x45026008
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
ARG131:0Argument 1

TMRTransfer Mode

Address
0x4502600C
Reset
0x0000
Access
read/write
Size
16-bit
5 fields
FieldBitsWhat it does
MSBSEL5Multi/Single Block Selection
  • 0 Single Block
  • 1 Multiple Block
DTDSEL4Data Transfer Direction Selection
  • 0 Write (Host to Card)
  • 1 Read (Card to Host)
ACMDEN3:2Auto Command Enable
  • 0 Auto Command Disabled
  • 1 Auto CMD12 Enable
  • 2 Auto CMD23 Enable
BCEN1Block Count Enable
  • 0 Disable
  • 1 Enable
DMAEN0DMA Enable
  • 0 No data transfer or Non DMA data transfer
  • 1 DMA data transfer

CRCommand

Address
0x4502600E
Reset
0x0000
Access
read/write
Size
16-bit
6 fields
FieldBitsWhat it does
CMDIDX13:8Command Index
CMDTYP7:6Command Type
  • 0 Other commands
  • 1 CMD52 for writing Bus Suspend in CCCR
  • 2 CMD52 for writing Function Select in CCCR
  • 3 CMD12, CMD52 for writing I/O Abort in CCCR
DPSEL5Data Present Select
  • 0 No Data Present
  • 1 Data Present
CMDICEN4Command Index Check Enable
  • 0 Disable
  • 1 Enable
CMDCCEN3Command CRC Check Enable
  • 0 Disable
  • 1 Enable
RESPTYP1:0Response Type
  • 0 No response
  • 1 136-bit response
  • 2 48-bit response
  • 3 48-bit response check busy after response

RR0Response

Address
0x45026010
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
CMDRESP31:0Command Response

RR1Response

Address
0x45026014
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
CMDRESP31:0Command Response

RR2Response

Address
0x45026018
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
CMDRESP31:0Command Response

RR3Response

Address
0x4502601C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
CMDRESP31:0Command Response

BDPRBuffer Data Port

Address
0x45026020
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
BUFDATA31:0Buffer Data

PSRPresent State

Address
0x45026024
Reset
0x00F80000
Access
read only
Size
32-bit
13 fields
FieldBitsWhat it does
CMDLL24CMD Line Level
DATLL23:20DAT[3:0] Line Level
WRPPL19Write Protect Pin Level
  • 0 Write protected (SDWP#=0)
  • 1 Write enabled (SDWP#=1)
CARDDPL18Card Detect Pin Level
  • 0 No card present (SDCD#=1)
  • 1 Card present (SDCD#=0)
CARDSS17Card State Stable
  • 0 Reset or Debouncing
  • 1 No Card or Insered
CARDINS16Card Inserted
  • 0 Reset or Debouncing or No Card
  • 1 Card inserted
BUFRDEN11Buffer Read Enable
  • 0 Read disable
  • 1 Read enable
BUFWREN10Buffer Write Enable
  • 0 Write disable
  • 1 Write enable
RTACT9Read Transfer Active
  • 0 No valid data
  • 1 Transferring data
WTACT8Write Transfer Active
  • 0 No valid data
  • 1 Transferring data
DLACT2DAT Line Active
  • 0 DAT Line Inactive
  • 1 DAT Line Active
CMDINHD1Command Inhibit (DAT)
  • 0 Can issue command which uses the DAT line
  • 1 Cannot issue command which uses the DAT line
CMDINHC0Command Inhibit (CMD)
  • 0 Can issue command using only CMD line
  • 1 Cannot issue command

HC1RHost Control 1

Address
0x45026028
Reset
0x00
Access
read/write
  1. 7CARDDSEL
  2. 6CARDDTL
  3. 5–
  4. 4DMASEL1
  5. 3DMASEL0
  6. 2HSEN
  7. 1DW
  8. 0LEDCTRL
6 fields
FieldBitsWhat it does
CARDDSEL7Card Detect Signal Selection
  • 0 SDCD# is selected (for normal use)
  • 1 The Card Select Test Level is selected (for test purpose)
CARDDTL6Card Detect Test Level
  • 0 No Card
  • 1 Card Inserted
DMASEL4:3DMA Select
  • 0 SDMA is selected
  • 2 32-bit Address ADMA2 is selected
HSEN2High Speed Enable
  • 0 Normal Speed mode
  • 1 High Speed mode
DW1Data Width
  • 0 1-bit mode
  • 1 4-bit mode
LEDCTRL0LED Control
  • 0 LED off
  • 1 LED on

PCRPower Control

Address
0x45026029
Reset
0x0E
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SDBPWR
1 field
FieldBitsWhat it does
SDBPWR0SD Bus Power
  • 0 Power off
  • 1 Power on

BGCRBlock Gap Control

Address
0x4502602A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INTBG
  6. 2RWCTRL
  7. 1CONTR
  8. 0STPBGR
4 fields
FieldBitsWhat it does
INTBG3Interrupt at Block Gap
  • 0 Disabled
  • 1 Enabled
RWCTRL2Read Wait Control
  • 0 Disable Read Wait Control
  • 1 Enable Read Wait Control
CONTR1Continue Request
  • 0 Not affected
  • 1 Restart
STPBGR0Stop at Block Gap Request
  • 0 Transfer
  • 1 Stop

WCRWakeup Control

Address
0x4502602B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2WKENCREM
  7. 1WKENCINS
  8. 0WKENCINT
3 fields
FieldBitsWhat it does
WKENCREM2Wakeup Event Enable on Card Removal
  • 0 Disable
  • 1 Enable
WKENCINS1Wakeup Event Enable on Card Insertion
  • 0 Disable
  • 1 Enable
WKENCINT0Wakeup Event Enable on Card Interrupt
  • 0 Disable
  • 1 Enable

CCRClock Control

Address
0x4502602C
Reset
0x0000
Access
read/write
Size
16-bit
6 fields
FieldBitsWhat it does
SDCLKFSEL15:8SDCLK Frequency Select
USDCLKFSEL7:6Upper Bits of SDCLK Frequency Select
CLKGSEL5Clock Generator Select
  • 0 Divided Clock Mode
  • 1 Programmable Clock Mode
SDCLKEN2SD Clock Enable
  • 0 Disable
  • 1 Enable
INTCLKS1Internal Clock Stable
  • 0 Not Ready
  • 1 Ready
INTCLKEN0Internal Clock Enable
  • 0 Stop
  • 1 Oscillate

TCRTimeout Control

Address
0x4502602E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3DTCVAL3
  6. 2DTCVAL2
  7. 1DTCVAL1
  8. 0DTCVAL0
1 field
FieldBitsWhat it does
DTCVAL3:0Data Timeout Counter Value

SRRSoftware Reset

Address
0x4502602F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SWRSTDAT
  7. 1SWRSTCMD
  8. 0SWRSTALL
3 fields
FieldBitsWhat it does
SWRSTDAT2Software Reset For DAT Line
  • 0 Work
  • 1 Reset
SWRSTCMD1Software Reset For CMD Line
  • 0 Work
  • 1 Reset
SWRSTALL0Software Reset For All
  • 0 Work
  • 1 Reset

NISTRNormal Interrupt Status

Address
0x45026030
Reset
0x0000
Access
read/write
Size
16-bit
11 fields
FieldBitsWhat it does
ERRINT15Error Interrupt
  • 0 No Error
  • 1 Error
BOOTAR14Boot Acknowledge Received
CINT8Card Interrupt
  • 0 No Card Interrupt
  • 1 Generate Card Interrupt
CREM7Card Removal
  • 0 Card state stable or Debouncing
  • 1 Card Removed
CINS6Card Insertion
  • 0 Card state stable or Debouncing
  • 1 Card inserted
BRDRDY5Buffer Read Ready
  • 0 Not ready to read buffer
  • 1 Ready to read buffer
BWRRDY4Buffer Write Ready
  • 0 Not ready to write buffer
  • 1 Ready to write buffer
DMAINT3DMA Interrupt
  • 0 No DMA Interrupt
  • 1 DMA Interrupt is generated
BLKGE2Block Gap Event
  • 0 No Block Gap Event
  • 1 Transaction stopped at block gap
TRFC1Transfer Complete
  • 0 Not complete
  • 1 Command execution is completed
CMDC0Command Complete
  • 0 No command complete
  • 1 Command complete

EISTRError Interrupt Status

Address
0x45026032
Reset
0x0000
Access
read/write
Size
16-bit
11 fields
FieldBitsWhat it does
BOOTAE12Boot Acknowledge Error
  • 0 FIFO contains at least one byte
  • 1 FIFO is empty
ADMA9ADMA Error
  • 0 No Error
  • 1 Error
ACMD8Auto CMD Error
  • 0 No Error
  • 1 Error
CURLIM7Current Limit Error
  • 0 No Error
  • 1 Power Fail
DATEND6Data End Bit Error
  • 0 No Error
  • 1 Error
DATCRC5Data CRC Error
  • 0 No Error
  • 1 Error
DATTEO4Data Timeout Error
  • 0 No Error
  • 1 Timeout
CMDIDX3Command Index Error
  • 0 No Error
  • 1 Error
CMDEND2Command End Bit Error
  • 0 No error
  • 1 End Bit Error Generated
CMDCRC1Command CRC Error
  • 0 No Error
  • 1 CRC Error Generated
CMDTEO0Command Timeout Error
  • 0 No Error
  • 1 Timeout

NISTERNormal Interrupt Status Enable

Address
0x45026034
Reset
0x0000
Access
read/write
Size
16-bit
10 fields
FieldBitsWhat it does
BOOTAR14Boot Acknowledge Received Status Enable
CINT8Card Interrupt Status Enable
  • 0 Masked
  • 1 Enabled
CREM7Card Removal Status Enable
  • 0 Masked
  • 1 Enabled
CINS6Card Insertion Status Enable
  • 0 Masked
  • 1 Enabled
BRDRDY5Buffer Read Ready Status Enable
  • 0 Masked
  • 1 Enabled
BWRRDY4Buffer Write Ready Status Enable
  • 0 Masked
  • 1 Enabled
DMAINT3DMA Interrupt Status Enable
  • 0 Masked
  • 1 Enabled
BLKGE2Block Gap Event Status Enable
  • 0 Masked
  • 1 Enabled
TRFC1Transfer Complete Status Enable
  • 0 Masked
  • 1 Enabled
CMDC0Command Complete Status Enable
  • 0 Masked
  • 1 Enabled

EISTERError Interrupt Status Enable

Address
0x45026036
Reset
0x0000
Access
read/write
Size
16-bit
11 fields
FieldBitsWhat it does
BOOTAE12Boot Acknowledge Error Status Enable
ADMA9ADMA Error Status Enable
  • 0 Masked
  • 1 Enabled
ACMD8Auto CMD Error Status Enable
  • 0 Masked
  • 1 Enabled
CURLIM7Current Limit Error Status Enable
  • 0 Masked
  • 1 Enabled
DATEND6Data End Bit Error Status Enable
  • 0 Masked
  • 1 Enabled
DATCRC5Data CRC Error Status Enable
  • 0 Masked
  • 1 Enabled
DATTEO4Data Timeout Error Status Enable
  • 0 Masked
  • 1 Enabled
CMDIDX3Command Index Error Status Enable
  • 0 Masked
  • 1 Enabled
CMDEND2Command End Bit Error Status Enable
  • 0 Masked
  • 1 Enabled
CMDCRC1Command CRC Error Status Enable
  • 0 Masked
  • 1 Enabled
CMDTEO0Command Timeout Error Status Enable
  • 0 Masked
  • 1 Enabled

NISIERNormal Interrupt Signal Enable

Address
0x45026038
Reset
0x0000
Access
read/write
Size
16-bit
10 fields
FieldBitsWhat it does
BOOTAR14Boot Acknowledge Received Signal Enable
CINT8Card Interrupt Signal Enable
  • 0 Masked
  • 1 Enabled
CREM7Card Removal Signal Enable
  • 0 Masked
  • 1 Enabled
CINS6Card Insertion Signal Enable
  • 0 Masked
  • 1 Enabled
BRDRDY5Buffer Read Ready Signal Enable
  • 0 Masked
  • 1 Enabled
BWRRDY4Buffer Write Ready Signal Enable
  • 0 Masked
  • 1 Enabled
DMAINT3DMA Interrupt Signal Enable
  • 0 Masked
  • 1 Enabled
BLKGE2Block Gap Event Signal Enable
  • 0 Masked
  • 1 Enabled
TRFC1Transfer Complete Signal Enable
  • 0 Masked
  • 1 Enabled
CMDC0Command Complete Signal Enable
  • 0 Masked
  • 1 Enabled

EISIERError Interrupt Signal Enable

Address
0x4502603A
Reset
0x0000
Access
read/write
Size
16-bit
11 fields
FieldBitsWhat it does
BOOTAE12Boot Acknowledge Error Signal Enable
ADMA9ADMA Error Signal Enable
  • 0 Masked
  • 1 Enabled
ACMD8Auto CMD Error Signal Enable
  • 0 Masked
  • 1 Enabled
CURLIM7Current Limit Error Signal Enable
  • 0 Masked
  • 1 Enabled
DATEND6Data End Bit Error Signal Enable
  • 0 Masked
  • 1 Enabled
DATCRC5Data CRC Error Signal Enable
  • 0 Masked
  • 1 Enabled
DATTEO4Data Timeout Error Signal Enable
  • 0 Masked
  • 1 Enabled
CMDIDX3Command Index Error Signal Enable
  • 0 Masked
  • 1 Enabled
CMDEND2Command End Bit Error Signal Enable
  • 0 Masked
  • 1 Enabled
CMDCRC1Command CRC Error Signal Enable
  • 0 Masked
  • 1 Enabled
CMDTEO0Command Timeout Error Signal Enable
  • 0 Masked
  • 1 Enabled

ACESRAuto CMD Error Status

Address
0x4502603C
Reset
0x0000
Access
read only
Size
16-bit
6 fields
FieldBitsWhat it does
CMDNI7Command not Issued By Auto CMD12 Error
  • 0 No error
  • 1 Not Issued
ACMDIDX4Auto CMD Index Error
  • 0 No error
  • 1 Error
ACMDEND3Auto CMD End Bit Error
  • 0 No error
  • 1 End Bit Error Generated
ACMDCRC2Auto CMD CRC Error
  • 0 No error
  • 1 CRC Error Generated
ACMDTEO1Auto CMD Timeout Error
  • 0 No error
  • 1 Timeout
ACMD12NE0Auto CMD12 Not Executed
  • 0 Executed
  • 1 Not executed

HC2RHost Control 2

Address
0x4502603E
Reset
0x0000
Access
read/write
Size
16-bit
2 fields
FieldBitsWhat it does
PVALEN15Preset Value Enable
  • 0 SDCLK and Driver Strength are controlled by Host Controller
  • 1 Automatic Selection by Preset Value is Enabled
ASINTEN14Asynchronous Interrupt Enable
  • 0 Disabled
  • 1 Enabled

CA0RCapabilities 0

Address
0x45026040
Reset
0x27E8008C
Access
read/write
Size
32-bit
12 fields
FieldBitsWhat it does
ASINTSUP29Asynchronous Interrupt Support
  • 0 Asynchronous Interrupt not Supported
  • 1 Asynchronous Interrupt supported
V30VSUP25Voltage Support 3.0V
  • 0 3.0V Not Supported
  • 1 3.0V Supported
V33VSUP24Voltage Support 3.3V
  • 0 3.3V Not Supported
  • 1 3.3V Supported
SRSUP23Suspend/Resume Support
  • 0 Suspend/Resume not Supported
  • 1 Suspend/Resume Supported
SDMASUP22SDMA Support
  • 0 SDMA not Supported
  • 1 SDMA Supported
HSSUP21High Speed Support
  • 0 High Speed not Supported
  • 1 High Speed Supported
ADMA2SUP19ADMA2 Support
  • 0 ADMA2 not Supported
  • 1 ADMA2 Supported
MAXBLKL17:16Max Block Length
  • 0 512 bytes
  • 1 1024 bytes
  • 2 2048 bytes
BASECLKF15:8Base Clock Frequency
  • 0 Get information via another method
TEOCLKU7Timeout Clock Unit
  • 0 KHz
  • 1 MHz
TEOCLKF5:0Timeout Clock Frequency
  • 0 Get information via another method
SLTYPE31:30Slot Type
  • 0 Removable Card Slot
  • 1 Embedded Slot for One Device

CA1RCapabilities 1

Address
0x45026044
Reset
0x00010070
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
CLKMULT23:16Clock Multiplier
  • 0 Clock Multiplier is Not Supported

MCCARMaximum Current Capabilities

Address
0x45026048
Reset
0x00000000
Access
read only
Size
32-bit
2 fields
FieldBitsWhat it does
MAXCUR30V15:8Maximum Current for 3.0V
  • 0 Get information via another method
  • 1 4mA
  • 2 8mA
  • 3 12mA
MAXCUR33V7:0Maximum Current for 3.3V
  • 0 Get information via another method
  • 1 4mA
  • 2 8mA
  • 3 12mA

FERACESForce Event for Auto CMD Error Status

Address
0x45026050
Reset
0x0000
Access
write only
Size
16-bit
6 fields
FieldBitsWhat it does
CMDNI7Force Event for Command Not Issued By Auto CMD12 Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMDIDX4Force Event for Auto CMD Index Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMDEND3Force Event for Auto CMD End Bit Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMDCRC2Force Event for Auto CMD CRC Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMDTEO1Force Event for Auto CMD Timeout Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMD12NE0Force Event for Auto CMD12 Not Executed
  • 0 No Interrupt
  • 1 Interrupt is generated

FEREISForce Event for Error Interrupt Status

Address
0x45026052
Reset
0x0000
Access
write only
Size
16-bit
11 fields
FieldBitsWhat it does
BOOTAE12Force Event for Boot Acknowledge Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ADMA9Force Event for ADMA Error
  • 0 No Interrupt
  • 1 Interrupt is generated
ACMD8Force Event for Auto CMD Error
  • 0 No Interrupt
  • 1 Interrupt is generated
CURLIM7Force Event for Current Limit Error
  • 0 No Interrupt
  • 1 Interrupt is generated
DATEND6Force Event for Data End Bit Error
  • 0 No Interrupt
  • 1 Interrupt is generated
DATCRC5Force Event for Data CRC Error
  • 0 No Interrupt
  • 1 Interrupt is generated
DATTEO4Force Event for Data Timeout Error
  • 0 No Interrupt
  • 1 Interrupt is generated
CMDIDX3Force Event for Command Index Error
  • 0 No Interrupt
  • 1 Interrupt is generated
CMDEND2Force Event for Command End Bit Error
  • 0 No Interrupt
  • 1 Interrupt is generated
CMDCRC1Force Event for Command CRC Error
  • 0 No Interrupt
  • 1 Interrupt is generated
CMDTEO0Force Event for Command Timeout Error
  • 0 No Interrupt
  • 1 Interrupt is generated

AESRADMA Error Status

Address
0x45026054
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2LMIS
  7. 1ERRST1
  8. 0ERRST0
2 fields
FieldBitsWhat it does
LMIS2ADMA Length Mismatch Error
  • 0 No Error
  • 1 Error
ERRST1:0ADMA Error State
  • 0 ST_STOP (Stop DMA)
  • 1 ST_FDS (Fetch Descriptor)
  • 3 ST_TFR (Transfer Data)

ASARADMA System Address n

Address
0x45026058
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
ADMASA31:0ADMA System Address

PVR0Preset Value n

Address
0x45026060
Reset
0x0000
Access
read/write
Size
16-bit
2 fields
FieldBitsWhat it does
CLKGSEL10Clock Generator Select Value for Initialization
  • 0 Host Controller Ver2.00 Compatible Clock Generator (Divider)
  • 1 Programmable Clock Generator
SDCLKFSEL9:0SDCLK Frequency Select Value for Initialization

PVR1Preset Value n

Address
0x45026062
Reset
0x0000
Access
read/write
Size
16-bit
2 fields
FieldBitsWhat it does
CLKGSEL10Clock Generator Select Value for Initialization
  • 0 Host Controller Ver2.00 Compatible Clock Generator (Divider)
  • 1 Programmable Clock Generator
SDCLKFSEL9:0SDCLK Frequency Select Value for Initialization

PVR2Preset Value n

Address
0x45026064
Reset
0x0000
Access
read/write
Size
16-bit
2 fields
FieldBitsWhat it does
CLKGSEL10Clock Generator Select Value for Initialization
  • 0 Host Controller Ver2.00 Compatible Clock Generator (Divider)
  • 1 Programmable Clock Generator
SDCLKFSEL9:0SDCLK Frequency Select Value for Initialization

SISRSlot Interrupt Status

Address
0x450260FC
Reset
0x0000
Access
read only
Size
16-bit
1 field
FieldBitsWhat it does
INTSSL1:0Interrupt Signal for Each Slot

HCVRHost Controller Version

Address
0x450260FE
Reset
0x2002
Access
read only
Size
16-bit
2 fields
FieldBitsWhat it does
VVER15:8Vendor Version
SVER7:0Spec Version

MC1Re.MMC Control 1

Address
0x45026204
Reset
0x00
Access
read/write
  1. 7FCD
  2. 6RSTN
  3. 5BOOTA
  4. 4OPD
  5. 3–
  6. 2–
  7. 1CMDTYP1
  8. 0CMDTYP0
5 fields
FieldBitsWhat it does
FCD7e.MMC Force Card Detect
RSTN6e.MMC Reset Signal
BOOTA5e.MMC Boot Acknowledge Enable
OPD4e.MMC Open Drain Mode
CMDTYP1:0e.MMC Command Type
  • 0 Not a MMC specific command
  • 1 Wait IRQ Command
  • 2 Stream Command
  • 3 Boot Command

MC2Re.MMC Control 2

Address
0x45026205
Reset
0x00
Access
write only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1ABOOT
  8. 0SRESP
2 fields
FieldBitsWhat it does
ABOOT1e.MMC Abort Boot
SRESP0e.MMC Abort Wait IRQ

ACRAHB Control

Address
0x45026208
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
BMAX1:0AHB Maximum Burst
  • 0
  • 1
  • 2
  • 3

CC2RClock Control 2

Address
0x4502620C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
FSDCLKD0Force SDCK Disabled
  • 0 No effect
  • 1 SDCLK can be stopped at any time after DATA transfer.SDCLK enable forcing for 8 SDCLK cycles is disabled

CACRCapabilities Control

Address
0x45026230
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
KEY15:8Key (0x46)
CAPWREN0Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)

DBGRDebug

Address
0x45026234
Reset
0x00000002
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
NIDBG0Non-intrusive debug enable
  • 0 Debugging is intrusive (reads of BDPR from debugger are considered and increment the internal buffer pointer)
  • 1 Debugging is not intrusive (reads of BDPR from debugger are discarded and do not increment the internal buffer pointer)