The 10 registers of MCRAMC (Multi-Channel RAM Controller), from 0x40003000, with their reset value and every field. The PIC32CM2532JH00048 has 1227 registers in 49 peripherals, one page each.
MCRAMC Multi-Channel RAM Controller
CTRLAControl Enable A Register
Address
0x40003000
Reset
0x00000002
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
ENABLE
1
ECC Decoder Enable
0 ECC decoding is disabled.
1 ECC decoding is enabled.
SWRST
0
Software Reset
0 No effect.
1 Reset the MCRAMC. A software-triggered hardware reset of the MCRAMC user interface is performed.
INTENCLRInterrupt Enable Clear Register
Address
0x40003008
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
DERREN
1
Double Bit Error Interrupt Enable, Clear
SERREN
0
Single Bit Error Interrupt Enable, Clear
INTENSETInterrupt Enable Set Register
Address
0x4000300C
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
DERREN
1
Double Bit Error Interrupt Enable, Set
SERREN
0
Single Bit Error Interrupt Enable, Set
INTSTAInterrupt Status Register
Address
0x40003010
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
DERR
1
Double Bit Error
SERR
0
Single Bit Error
FLTCTRLFault Injection Control Register
Address
0x40003014
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
FLTMD
13:12
Fault Injection Mode
0 Fault Injection Disabled
1 Single Fault Injection at bit selected by FLTPTR.FTL1PTR
2 Double Fault Injection at bits FLTPTR.FTL1PTR and FLTPTR.FTL2PTR
FLTEN
1
Fault Injection Enabled
0 Disables fault injection.
1 Enables fault injection at FLTADR address offset as selected by FLTMD and FLTxPTR.