PIC32CM2532JH01032 MCLK registers The 9 registers of MCLK (Main Clock), from 0x40000801, with their reset value and every field. The PIC32CM2532JH01032 has 1128 registers in 48 peripherals, one page each.
MCLK Main Clock INTENCLRInterrupt Enable Clear
Address 0x40000801
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 CKRDY 1 field
Field Bits What it does CKRDY 0 Clock Ready Interrupt Enable
INTENSETInterrupt Enable Set
Address 0x40000802
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 CKRDY 1 field
Field Bits What it does CKRDY 0 Clock Ready Interrupt Enable
INTFLAGInterrupt Flag Status and Clear
Address 0x40000803
Reset 0x01
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 CKRDY 1 field
Field Bits What it does CKRDY 0 Clock Ready
CPUDIVCPU Clock Division
Address 0x40000804
Reset 0x01
Access read/write 7 CPUDIV7 6 CPUDIV6 5 CPUDIV5 4 CPUDIV4 3 CPUDIV3 2 CPUDIV2 1 CPUDIV1 0 CPUDIV0 1 field
Field Bits What it does CPUDIV 7:0 CPU Clock Division Factor1 Divide by 12 Divide by 24 Divide by 48 Divide by 816 Divide by 1632 Divide by 3264 Divide by 64128 Divide by 128
AHBMASKAHB Mask
Address 0x40000810
Reset 0x00007FFF
Access read/write
Size 32-bit 13 fields
Field Bits What it does ICM_ 14 ICM AHB Clock Mask APBD_ 13 APBD AHB Clock Mask DIVAS_ 12 DIVAS AHB Clock Mask PAC_ 10 PAC AHB Clock Mask CAN0_ 8 CAN0 AHB Clock Mask DMAC_ 7 DMAC AHB Clock Mask MCRAMC_ 6 MCRAMC AHB Clock Mask NVMCTRL_ 5 NVMCTRL AHB Clock Mask HMATRIXHS_ 4 HMATRIXHS AHB Clock Mask DSU_ 3 DSU AHB Clock Mask APBC_ 2 APBC AHB Clock Mask APBB_ 1 APBB AHB Clock Mask APBA_ 0 APBA AHB Clock Mask
APBAMASKAPBA Mask
Address 0x40000814
Reset 0x00001FFF
Access read/write
Size 32-bit 13 fields
Field Bits What it does MCRAMC_ 12 MCRAMC APB Clock Enable FREQM_ 11 FREQM APB Clock Enable EIC_ 10 EIC APB Clock Enable RTC_ 9 RTC APB Clock Enable WDT_ 8 WDT APB Clock Enable GCLK_ 7 GCLK APB Clock Enable SUPC_ 6 SUPC APB Clock Enable OSC32KCTRL_ 5 OSC32KCTRL APB Clock Enable OSCCTRL_ 4 OSCCTRL APB Clock Enable RSTC_ 3 RSTC APB Clock Enable MCLK_ 2 MCLK APB Clock Enable PM_ 1 PM APB Clock Enable PAC_ 0 PAC APB Clock Enable
APBBMASKAPBB Mask
Address 0x40000818
Reset 0x00000007
Access read/write
Size 32-bit 4 fields
Field Bits What it does HMATRIXHS_ 5 HMATRIXHS APB Clock Enable NVMCTRL_ 2 NVMCTRL APB Clock Enable DSU_ 1 DSU APB Clock Enable PORT_ 0 PORT APB Clock Enable
APBCMASKAPBC Mask
Address 0x4000081C
Reset 0x08000000
Access read/write
Size 32-bit 22 fields
Field Bits What it does SMBIST_ 27 SMBIST APB Clock Enable PDEC_ 26 PDEC APB Clock Enable ICM_ 25 ICM APB Clock Enable CCL_ 22 CCL APB Clock Enable PTC_ 21 PTC APB Clock Enable DAC_ 20 DAC APB Clock Enable AC_ 19 AC APB Clock Enable ADC1_ 18 ADC1 APB Clock Enable ADC0_ 17 ADC0 APB Clock Enable TC4_ 16 TC4 APB Clock Enable TC3_ 15 TC3 APB Clock Enable TC2_ 14 TC2 APB Clock Enable TC1_ 13 TC1 APB Clock Enable TC0_ 12 TC0 APB Clock Enable TCC2_ 11 TCC2 APB Clock Enable TCC1_ 10 TCC1 APB Clock Enable TCC0_ 9 TCC0 APB Clock Enable SERCOM3_ 4 SERCOM3 APB Clock Enable SERCOM2_ 3 SERCOM2 APB Clock Enable SERCOM1_ 2 SERCOM1 APB Clock Enable SERCOM0_ 1 SERCOM0 APB Clock Enable EVSYS_ 0 EVSYS APB Clock Enable
APBDMASKAPBD Mask
Address 0x40000820
Reset 0x00000000
Access read/write
Size 32-bit 3 fields
Field Bits What it does TC7_ 4 TC7 APB Clock Enable TC6_ 3 TC6 APB Clock Enable TC5_ 2 TC5 APB Clock Enable