The 13 registers of PAC (Peripheral Access Controller), from 0x40000000, with their reset value and every field. The PIC32CM2532JH01032 has 1128 registers in 48 peripherals, one page each.
PAC Peripheral Access Controller
WRCTRLWrite control
Address
0x40000000
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
KEY
23:16
Peripheral access control key
0 No action
1 Clear protection
2 Set protection
3 Set and lock protection
PERID
15:0
Peripheral identifier
EVCTRLEvent control
Address
0x40000004
Reset
0x00
Access
read/write
7–
6–
5–
4–
3–
2–
1–
0ERREO
1 field
Field
Bits
What it does
ERREO
0
Peripheral acess error event output
INTENCLRInterrupt enable clear
Address
0x40000008
Reset
0x00
Access
read/write
7–
6–
5–
4–
3–
2–
1–
0ERR
1 field
Field
Bits
What it does
ERR
0
Peripheral access error interrupt disable
INTENSETInterrupt enable set
Address
0x40000009
Reset
0x00
Access
read/write
7–
6–
5–
4–
3–
2–
1–
0ERR
1 field
Field
Bits
What it does
ERR
0
Peripheral access error interrupt enable
INTFLAGAHBBridge interrupt flag status
Address
0x40000010
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
Field
Bits
What it does
HMCRAMCHS_ICM_
9
SRAM ICM
APBD_
8
HPB3
DIVAS_
7
DIVAS
LPRAMDMAC_
6
SRAM DMAC
APBC_
5
HPB2
APBA_
4
HPB0
APBB_
3
HPB1
HSRAMDSU_
2
SRAM DSU
HSRAMCM0P_
1
SRAM CPU
FLASH_
0
FLASH
INTFLAGAPeripheral interrupt flag status - Bridge A
Address
0x40000014
Reset
0x00000000
Access
read/write
Size
32-bit
13 fields
Field
Bits
What it does
MCRAMC_
12
MCRAMC
FREQM_
11
FREQM
EIC_
10
EIC
RTC_
9
RTC
WDT_
8
WDT
GCLK_
7
GCLK
SUPC_
6
SUPC
OSC32KCTRL_
5
OSC32KCTRL
OSCCTRL_
4
OSCCTRL
RSTC_
3
RSTC
MCLK_
2
MCLK
PM_
1
PM
PAC_
0
PAC
INTFLAGBPeripheral interrupt flag status - Bridge B
Address
0x40000018
Reset
0x00000000
Access
read/write
Size
32-bit
6 fields
Field
Bits
What it does
HMATRIXHS_
5
HMATRIXHS
MTB_
4
MTB
DMAC_
3
DMAC
NVMCTRL_
2
NVMCTRL
DSU_
1
DSU
PORT_
0
PORT
INTFLAGCPeripheral interrupt flag status - Bridge C
Address
0x4000001C
Reset
0x00000000
Access
read/write
Size
32-bit
23 fields
Field
Bits
What it does
SMBIST_
27
SMBIST
PDEC_
26
PDEC
ICM_
25
ICM
CCL_
22
CCL
PTC_
21
PTC
DAC_
20
DAC
AC_
19
AC
ADC1_
18
ADC1
ADC0_
17
ADC0
TC4_
16
TC4
TC3_
15
TC3
TC2_
14
TC2
TC1_
13
TC1
TC0_
12
TC0
TCC2_
11
TCC2
TCC1_
10
TCC1
TCC0_
9
TCC0
CAN0_
7
CAN0
SERCOM3_
4
SERCOM3
SERCOM2_
3
SERCOM2
SERCOM1_
2
SERCOM1
SERCOM0_
1
SERCOM0
EVSYS_
0
EVSYS
INTFLAGDPeripheral interrupt flag status - Bridge D
Address
0x40000020
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
Field
Bits
What it does
TC7_
4
TC7
TC6_
3
TC6
TC5_
2
TC5
STATUSAPeripheral write protection status - Bridge A
Address
0x40000034
Reset
0x00000000
Access
read only
Size
32-bit
13 fields
Field
Bits
What it does
MCRAMC_
12
MCRAMC APB Protect Enable
FREQM_
11
FREQM APB Protect Enable
EIC_
10
EIC APB Protect Enable
RTC_
9
RTC APB Protect Enable
WDT_
8
WDT APB Protect Enable
GCLK_
7
GCLK APB Protect Enable
SUPC_
6
SUPC APB Protect Enable
OSC32KCTRL_
5
OSC32KCTRL APB Protect Enable
OSCCTRL_
4
OSCCTRL APB Protect Enable
RSTC_
3
RSTC APB Protect Enable
MCLK_
2
MCLK APB Protect Enable
PM_
1
PM APB Protect Enable
PAC_
0
PAC APB Protect Enable
STATUSBPeripheral write protection status - Bridge B
Address
0x40000038
Reset
0x00000002
Access
read only
Size
32-bit
6 fields
Field
Bits
What it does
HMATRIXHS_
5
HMATRIXHS APB Protect Enable
MTB_
4
MTB APB Protect Enable
DMAC_
3
DMAC APB Protect Enable
NVMCTRL_
2
NVMCTRL APB Protect Enable
DSU_
1
DSU APB Protect Enable
PORT_
0
PORT APB Protect Enable
STATUSCPeripheral write protection status - Bridge C
Address
0x4000003C
Reset
0x09000000
Access
read only
Size
32-bit
23 fields
Field
Bits
What it does
SMBIST_
27
SMBIST APB Protect Enable
PDEC_
26
PDEC APB Protect Enable
ICM_
25
ICM APB Protect Enable
CCL_
22
CCL APB Protect Enable
PTC_
21
PTC APB Protect Enable
DAC_
20
DAC APB Protect Enable
AC_
19
AC APB Protect Enable
ADC1_
18
ADC1 APB Protect Enable
ADC0_
17
ADC0 APB Protect Enable
TC4_
16
TC4 APB Protect Enable
TC3_
15
TC3 APB Protect Enable
TC2_
14
TC2 APB Protect Enable
TC1_
13
TC1 APB Protect Enable
TC0_
12
TC0 APB Protect Enable
TCC2_
11
TCC2 APB Protect Enable
TCC1_
10
TCC1 APB Protect Enable
TCC0_
9
TCC0 APB Protect Enable
CAN0_
7
CAN0 APB Protect Enable
SERCOM3_
4
SERCOM3 APB Protect Enable
SERCOM2_
3
SERCOM2 APB Protect Enable
SERCOM1_
2
SERCOM1 APB Protect Enable
SERCOM0_
1
SERCOM0 APB Protect Enable
EVSYS_
0
EVSYS APB Protect Enable
STATUSDPeripheral write protection status - Bridge D