PIC32CM5164JH00032 OSCCTRL registers

The 18 registers of OSCCTRL (Oscillators Control), from 0x40001000, with their reset value and every field. The PIC32CM5164JH00032 has 1081 registers in 47 peripherals, one page each.

OSCCTRL Oscillators Control

INTENCLRInterrupt Enable Clear

Address
0x40001000
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
FieldBitsWhat it does
DPLLLDRTO11DPLL Ratio Ready Interrupt Enable
DPLLLTO10DPLL Time Out Interrupt Enable
DPLLLCKF9DPLL Lock Fall Interrupt Enable
DPLLLCKR8DPLL Lock Rise Interrupt Enable
OSC48MRDY4OSC48M Ready Interrupt Enable
XOSCFAIL1XOSC Clock Failure Detector Interrupt Enable
XOSCRDY0XOSC Ready Interrupt Enable

INTENSETInterrupt Enable Set

Address
0x40001004
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
FieldBitsWhat it does
DPLLLDRTO11DPLL Ratio Ready Interrupt Enable
DPLLLTO10DPLL Time Out Interrupt Enable
DPLLLCKF9DPLL Lock Fall Interrupt Enable
DPLLLCKR8DPLL Lock Rise Interrupt Enable
OSC48MRDY4OSC48M Ready Interrupt Enable
XOSCFAIL1XOSC Clock Failure Detector Interrupt Enable
XOSCRDY0XOSC Ready Interrupt Enable

INTFLAGInterrupt Flag Status and Clear

Address
0x40001008
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
FieldBitsWhat it does
DPLLLDRTO11DPLL Ratio Ready
DPLLLTO10DPLL Timeout
DPLLLCKF9DPLL Lock Fall
DPLLLCKR8DPLL Lock Rise
OSC48MRDY4OSC48M Ready
XOSCFAIL1XOSC Clock Failure Detector
XOSCRDY0XOSC Ready

STATUSPower and Clocks Status

Address
0x4000100C
Reset
0x00000000
Access
read only
Size
32-bit
8 fields
FieldBitsWhat it does
DPLLLDRTO11DPLL Ratio Ready
DPLLLTO10DPLL Timeout
DPLLLCKF9DPLL Lock Fall
DPLLLCKR8DPLL Lock Rise
OSC48MRDY4OSC48M Ready
XOSCCKSW2XOSC Clock Switch
XOSCFAIL1XOSC Clock Failure Detector
XOSCRDY0XOSC Ready

XOSCCTRLExternal Multipurpose Crystal Oscillator (XOSC) Control

Address
0x40001010
Reset
0x0080
Access
read/write
Size
16-bit
9 fields
FieldBitsWhat it does
STARTUP15:12Start-Up Time
  • 0 1 cycle
  • 1 2 cycles
  • 2 4 cycles
  • 3 8 cycles
  • 4 16 cycles
  • 5 32 cycles
  • 6 64 cycles
  • 7 128 cycles
  • 8 256 cycles
  • 9 512 cycles
  • 10 1024 cycles
  • 11 2048 cycles
  • 12 4096 cycles
  • 13 8192 cycles
  • 14 16384 cycles
  • 15 32768 cycles
AMPGC11Automatic Amplitude Gain Control
GAIN10:8Oscillator Gain
  • 0 2 MHz
  • 1 4 MHz
  • 2 8 MHz
  • 3 16 MHz
  • 4 32 MHz
ONDEMAND7On Demand Control
RUNSTDBY6Run in Standby
SWBEN4Clock Switch Back Enable
CFDEN3Xosc Clock Failure Detector Enable
XTALEN2Crystal Oscillator Enable
ENABLE1Oscillator Enable

CFDPRESCClock Failure Detector Prescaler

Address
0x40001012
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CFDPRESC2
  7. 1CFDPRESC1
  8. 0CFDPRESC0
1 field
FieldBitsWhat it does
CFDPRESC2:0Clock Failure Detector Prescaler
  • 0 OSC48M frequency
  • 1 OSC48M frequency / 2
  • 2 OSC48M frequency / 4
  • 3 OSC48M frequency / 8
  • 4 OSC48M frequency / 16
  • 5 OSC48M frequency / 32
  • 6 OSC48M frequency / 64
  • 7 OSC48M frequency / 128

EVCTRLEvent Control

Address
0x40001013
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CFDEO
1 field
FieldBitsWhat it does
CFDEO0Clock Failure Detector Event Output Enable

OSC48MCTRL48MHz Internal Oscillator (OSC48M) Control

Address
0x40001014
Reset
0x82
Access
read/write
  1. 7ONDEMAND
  2. 6RUNSTDBY
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1ENABLE
  8. 0–
3 fields
FieldBitsWhat it does
ONDEMAND7On Demand Control
RUNSTDBY6Run in Standby
ENABLE1Oscillator Enable

OSC48MDIVOSC48M Divider

Address
0x40001015
Reset
0x0B
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3DIV3
  6. 2DIV2
  7. 1DIV1
  8. 0DIV0
1 field
FieldBitsWhat it does
DIV3:0OSC48M Division Factor
  • 0 48 MHz
  • 1 24 MHz
  • 2 16 MHz
  • 3 12 MHz
  • 4 9.6 MHz
  • 5 8 MHz
  • 6 6.86 MHz
  • 7 6 MHz
  • 8 5.33 MHz
  • 9 4.8 MHz
  • 10 4.36 MHz
  • 11 4 MHz
  • 12 3.69 MHz
  • 13 3.43 MHz
  • 14 3.2 MHz
  • 15 3 MHz

OSC48MSTUPOSC48M Startup Time

Address
0x40001016
Reset
0x07
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2STARTUP2
  7. 1STARTUP1
  8. 0STARTUP0
1 field
FieldBitsWhat it does
STARTUP2:0Startup Time
  • 0 166 ns
  • 1 333 ns
  • 2 667 ns
  • 3 1.333 us
  • 4 2.667 us
  • 5 5.333 us
  • 6 10.667 us
  • 7 21.333 us

OSC48MSYNCBUSYOSC48M Synchronization Busy

Address
0x40001018
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
OSC48MDIV2OSC48MDIV Synchronization Status

DPLLCTRLADPLL Control

Address
0x4000101C
Reset
0x80
Access
read/write
  1. 7ONDEMAND
  2. 6RUNSTDBY
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1ENABLE
  8. 0–
3 fields
FieldBitsWhat it does
ONDEMAND7On Demand
RUNSTDBY6Run in Standby
ENABLE1Enable

DPLLRATIODPLL Ratio Control

Address
0x40001020
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
LDRFRAC19:16Loop Divider Ratio Fractional Part
LDR11:0Loop Divider Ratio

DPLLCTRLBDigital Core Configuration

Address
0x40001024
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
FieldBitsWhat it does
DIV26:16Clock Divider
LBYPASS12Lock Bypass
LTIME10:8Lock Time
  • 0 No time-out. Automatic lock
  • 4 Time-out if no lock within 8 ms
  • 5 Time-out if no lock within 9 ms
  • 6 Time-out if no lock within 10 ms
  • 7 Time-out if no lock within 11 ms
REFCLK5:4Reference Clock Selection
  • 0 XOSC32K Clock Reference
  • 1 XOSC Clock Reference
  • 2 GCLK Clock Reference
WUF3Wake Up Fast
LPEN2Low-Power Enable
FILTER1:0Proportional Integral Filter Selection
  • 0 Default Filter Mode
  • 1 Low Bandwidth Filter
  • 2 High Bandwidth Filter
  • 3 High Damping Filter

DPLLPRESCDPLL Prescaler

Address
0x40001028
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1PRESC1
  8. 0PRESC0
1 field
FieldBitsWhat it does
PRESC1:0Output Clock Prescaler
  • 0 DPLL output is divided by 1
  • 1 DPLL output is divided by 2
  • 2 DPLL output is divided by 4

DPLLSYNCBUSYDPLL Synchronization Busy

Address
0x4000102C
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3DPLLPRESC
  6. 2DPLLRATIO
  7. 1ENABLE
  8. 0–
3 fields
FieldBitsWhat it does
DPLLPRESC3DPLL Prescaler Synchronization Status
DPLLRATIO2DPLL Ratio Synchronization Status
ENABLE1DPLL Enable Synchronization Status

DPLLSTATUSDPLL Status

Address
0x40001030
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CLKRDY
  8. 0LOCK
2 fields
FieldBitsWhat it does
CLKRDY1DPLL Clock Ready
LOCK0DPLL Lock Status

CAL48M48MHz Oscillator Calibration

Address
0x40001038
Reset
0x00200220
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
TCAL21:16Temperature Calibration (48MHz)
FRANGE9:8Frequency Range (48MHz)
FCAL5:0Frequency Calibration (48MHz)