CTRLAControl
- Address
0x40001C00- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0SWRST
1 field
| Field | Bits | What it does |
|---|---|---|
| SWRST | 0 | Software Reset |
The 45 registers of GCLK (Generic Clock Generator), from 0x40001C00, with their reset value and every field. The PIC32CM5164LS00100 has 2513 registers in 56 peripherals, one page each.
0x40001C000x00| Field | Bits | What it does |
|---|---|---|
| SWRST | 0 | Software Reset |
0x40001C040x00000000| Field | Bits | What it does |
|---|---|---|
| GENCTRL7 | 9 | Generic Clock Generator Control 7 Synchronization Busy bit |
| GENCTRL6 | 8 | Generic Clock Generator Control 6 Synchronization Busy bit |
| GENCTRL5 | 7 | Generic Clock Generator Control 5 Synchronization Busy bit |
| GENCTRL4 | 6 | Generic Clock Generator Control 4 Synchronization Busy bit |
| GENCTRL3 | 5 | Generic Clock Generator Control 3 Synchronization Busy bit |
| GENCTRL2 | 4 | Generic Clock Generator Control 2 Synchronization Busy bit |
| GENCTRL1 | 3 | Generic Clock Generator Control 1 Synchronization Busy bit |
| GENCTRL0 | 2 | Generic Clock Generator Control 0 Synchronization Busy bit |
| SWRST | 0 | Software Reset Synchronization Busy bit |
0x40001C200x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C240x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C280x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C2C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C300x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C340x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C380x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C3C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x40001C800x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C840x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C880x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C8C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C900x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C940x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C980x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001C9C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CA00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CA40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CA80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CAC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CB00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CB40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CB80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CBC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CC00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CC40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CC80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CCC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CD00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CD40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CD80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CDC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CE00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CE40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CE80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CEC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CF00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CF40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CF80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001CFC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001D000x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001D040x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|
0x40001D080x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 2:0 | Generic Clock Generator
|