PIC32CM6408PL10064 CCL registers

The 7 registers of CCL (Configurable Custom Logic), from 0x42002400, with their reset value and every field. The PIC32CM6408PL10064 has 702 registers in 32 peripherals, one page each.

CCL Configurable Custom Logic

CTRLAControl A

Address
0x42002400
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
RUNSTDBY6Run in Standby
ENABLE1Enable
SWRST0Software Reset

SEQCTRLSequential Control

Address
0x42002404
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
SEQSEL111:8Sequential Selection 1
  • 0 Sequential logic is disabled
  • 1 D flip-flop
  • 2 JK flip-flop
  • 3 D latch
  • 4 RS latch
SEQSEL03:0Sequential Selection 0
  • 0 Sequential logic is disabled
  • 1 D flip-flop
  • 2 JK flip-flop
  • 3 D latch
  • 4 RS latch

LUTCTRL0LUT Control #

Address
0x42002408
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
FieldBitsWhat it does
LUTEO22LUT Event Output Enable
LUTEI21LUT Event Input Enable
LUTINV20LUT Inverted Event Input Enable
INSEL219:16LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL115:12LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL011:8LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
TRUTH31:24Truth Table

LUTCTRL1LUT Control #

Address
0x4200240C
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
FieldBitsWhat it does
LUTEO22LUT Event Output Enable
LUTEI21LUT Event Input Enable
LUTINV20LUT Inverted Event Input Enable
INSEL219:16LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL115:12LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL011:8LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
TRUTH31:24Truth Table

LUTCTRL2LUT Control #

Address
0x42002410
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
FieldBitsWhat it does
LUTEO22LUT Event Output Enable
LUTEI21LUT Event Input Enable
LUTINV20LUT Inverted Event Input Enable
INSEL219:16LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL115:12LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL011:8LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
TRUTH31:24Truth Table

LUTCTRL3LUT Control #

Address
0x42002414
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
FieldBitsWhat it does
LUTEO22LUT Event Output Enable
LUTEI21LUT Event Input Enable
LUTINV20LUT Inverted Event Input Enable
INSEL219:16LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL115:12LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
INSEL011:8LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source
  • 4 I/O pin input source
  • 5 AC input source: CMP[0] (LUT0) / CMP[1] (LUT1) / CMP[0] (LUT2) / CMP[1] (LUT3)
  • 6 TC input source: TC0 (LUT0) / TC1 (LUT1) / TC2 (LUT2) / TC0 (LUT3)
  • 8 TCC input source: TCC0
  • 9 SERCOM input source: SERCOM0 (LUT0) / SERCOM1 (LUT1) / SERCOM0 (LUT2) / SERCOM1 (LUT3)
  • 11 Asynchronous event input source
EDGESEL7Edge Selection
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
TRUTH31:24Truth Table

WPCTRLWrite Protection Control

Address
0x42002428
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WPLCK1Write Protection Lock
WPEN0Write Protection Enable
WPKEY31:8Write Protection Key
  • 4408140 Allow writes to the WPCTRL register