The 16 registers of NVMCTRL (Non-Volatile Memory Controller), from 0x41004000, with their reset value and every field. The PIC32CX1025SG60100 has 2953 registers in 69 peripherals, one page each.
NVMCTRL Non-Volatile Memory Controller
CTRLAControl A
Address
0x41004000
Reset
0x0004
Access
read/write
Size
16-bit
9 fields
Field
Bits
What it does
CACHEDIS1
15
AHB1 Cache Disable
CACHEDIS0
14
AHB0 Cache Disable
AHBNS1
13
Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated
AHBNS0
12
Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated
RWS
11:8
NVM Read Wait States
PRM
7:6
Power Reduction Mode during Sleep
0 NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access.
1 NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode when system is not in standby mode.
3 NVM block does not enter low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access.
WMODE
5:4
Write Mode
0 Manual Write
1 Automatic Double Word Write
2 Automatic Quad Word
3 Automatic Page Write
SUSPEN
3
Suspend Enable
AUTOWS
2
Auto Wait State Enable
CTRLBControl B
Address
0x41004004
Reset
0x0000
Access
write only
Size
16-bit
2 fields
Field
Bits
What it does
CMDEX
15:8
Command Execution
165 Execution Key
CMD
6:0
Command
0 Erase Page - Only supported in the USER and AUX pages.
1 Erase Block - Erases the block addressed by the ADDR register, not supported in the user page
3 Write Page - Writes the contents of the page buffer to the page addressed by the ADDR register, not supported in the user page
4 Write Quad Word - Writes a 128-bit word at the location addressed by the ADDR register.
16 Software Reset - Power-Cycle the NVM memory and replay the device automatic calibration procedure and resets the module configuration registers
17 Lock Region - Locks the region containing the address location in the ADDR register.
18 Unlock Region - Unlocks the region containing the address location in the ADDR register.
19 Sets the power reduction mode.
20 Clears the power reduction mode.
21 Page Buffer Clear - Clears the page buffer.
22 Set Security Bit
23 Bank swap and system reset, if SMEE is used also reallocate SMEE data into the opposite BANK
24 Chip Erase Lock - DSU.CE command is not available
25 Chip Erase Unlock - DSU.CE command is available
26 Sets STATUS.BPDIS, Boot loader protection is discarded until CBPDIS is issued or next start-up sequence
27 Clears STATUS.BPDIS, Boot loader protection is not discarded
28 Set Chip Erase Hard Lock - DSU.CTRL.CE command is not available