The 4 registers of CoreDebug (Core Debug Register), from 0xE000EDF0, with their reset value and every field. The PIC32CX2051MTG64 has 2801 registers in 57 peripherals, one page each.
CoreDebug Core Debug Register
DHCSRDebug Halting Control and Status Register
Address
0xE000EDF0
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
S_RESET_ST
25
Reset Status
S_RETIRE_ST
24
Retire Status
S_LOCKUP
19
Locked up status
S_SLEEP
18
Sleep status
S_HALT
17
Debug state status
S_REGRDY
16
Transfer complete flag
C_SNAPSTALL
5
Allow imprecise entry to Debug state
C_MASKINTS
3
Mask PendSV, SysTick and external configurable interrupts
C_STEP
2
Processor step bit
C_HALT
1
Processor halt bit
C_DEBUGEN
0
Halting debug enable bit
DBGKEY
31:16
Debug key
DCRSRDebug Core Register Selector Register
Address
0xE000EDF4
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
Field
Bits
What it does
REGWnR
16
Specifies the access type for the transfer
REGSEL
4:0
Specifies the Arm core register, special-purpose register, or Floating-point Extension register, to transfer