The 25 registers of FCR (Flash Read Controller (FCR)), from 0x44004000, with their reset value and every field. The PIC32CZ4010CA90144 has 5988 registers in 67 peripherals, one page each.
FCR Flash Read Controller (FCR)
CTRLAControl A Register
Address
0x44004000
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
RDBUFWS
19:16
Data returned from the Read Buffer match the Flash Wait States
AUTOWS
15
Automatic Wait State Enable.
ADRWS
14
Address Wait State Enable
FWS
11:8
Flash Access Time Defined in terms of AHB Clock Wait States
ARB
2
AHB Arbitration scheme
CTRLBControl B Register
Address
0x44004004
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
Field
Bits
What it does
SLP
9:8
NVM Power Reduction Mode selection during System Standby Sleep
TEMP
1
NVM Operating Temperature Read Mode
PRM
0
Set NVM Power Reduction Mode
INTENCLRInterrupt Enable Clear Register
Address
0x44004008
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
FLTCAP
16
ECC Fault Capture Clear Enable
CRCERR
9
CRC Error Clear Enable
CRCDONE
8
CRC Calculation Done Clear Enable
DERR
1
ECC Double Error Detected Clear Enable
SERR
0
Flash SEC Interrupt Clear Enable
INTENSETInterrupt Enable SET Register
Address
0x4400400C
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
FLTCAP
16
ECC Fault Capture Interrupt Set Enable
CRCERR
9
CRC Error Interrupt Set Enable
CRCDONE
8
CRC Calculation Done Set Enable
DERR
1
ECC Double Error Detected Set Enable
SERR
0
Flash Single Error Corrected Set Enable
INTFLAGInterrupt Flag Register
Address
0x44004010
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
FLTCAP
16
ECC Fault Capture Flag
CRCERR
9
CRC Error Flag
CRCDONE
8
CRC Calculation Done Flag
DERR
1
ECC Double Error Detected Flag
SERR
0
Flash Single Error Corrected Flag
STATUSNVM Status Register
Address
0x44004014
Reset
0x80000000
Access
read only
Size
32-bit
2 fields
Field
Bits
What it does
TEMP
1
NVM Operating Temperature Read Mode Status
PRM
0
NVM Power Reduction Mode Status
DBGCTRLDebug Control Register
Address
0x44004018
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
DBGECC
2:1
Debug ECC Mode
CRCRUN
0
CRC Debug Run
ECCCTRLECC Control Register
Address
0x4400401C
Reset
0x00000040
Access
read/write
Size
32-bit
3 fields
Field
Bits
What it does
SECCNT
15:8
Flash SEC Count
ECCUNLCK
6
NVM ECC Mode Control Unlock
ECCCTL
5:4
NVM ECC Mode Control- restricts one or more NVMOPs
CRCCTRLCRC Control Register
Address
0x44004020
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
Field
Bits
What it does
RIN
15
CRC Reflected Input
ROUT
14
CRC Reflected Output
AUTOR
13
CRC Auto Repeat
PLEN32
12
Polynomial Length Select
RUNSTDBY
5
CRC Run in Standby
CRCEN
1
Start CRC Calculation
CRCRST
0
CRC Reset
PERIOD
31:16
Read Period in GCLK counts
CRCPAUSECRC PAUSE Register
Address
0x44004024
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
PAUSE
0
CRC Pause
CRCMADRCRC Message Address Register
Address
0x44004028
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCMADR
27:0
Message Start Address in Flash
CRCMLENCRC Message Length Register
Address
0x4400402C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCMLEN
23:0
Message Length in Bytes
CRCIVCRC Initial Value Register
Address
0x44004030
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCIV
31:0
CRC Initial Value
CRCACCCRC Accumulator Register
Address
0x44004034
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
CRCACC
31:0
CRC Accumulator Result
CRCPOLYCRC Polynomial Register
Address
0x44004038
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCPOLY
31:0
CRC Polynomial Coefficients for LFSR
CRCFXORCRC Final XOR Register
Address
0x4400403C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCFXOR
31:0
CRC Final XOR
CRCSUMCRC Checksum Register
Address
0x44004040
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
CRCSUM
31:0
CRC Checksum
FFLTCTRLFlash ECC Fault Control Register
Address
0x44004044
Reset
0x00000000
Access
read/write
Size
32-bit
4 fields
Field
Bits
What it does
FLTMD
14:12
Fault Mode Control
CTLFLT
10:8
ECC/Parity Control Fault bits
FLTEN
1
ECC Fault Enable bit
FLTRST
0
Fault Reset
FFLTPTRFlash ECC Fault Pointer Register
Address
0x44004048
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
FLT2PTR
24:16
Fault 2 Injection Pointer
FLT1PTR
8:0
Fault 1 Injection Pointer
FFLTADRFlash Fault Address Register
Address
0x4400404C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
FLTADR
27:0
Fault Inject Mode - Physical Address
FFLTCAPFlash Fault Capture Address Register
Address
0x44004050
Reset
0x00000000
Access
read only
Size
32-bit
1 field
Field
Bits
What it does
FLTADR
27:0
Fault capture Mode - Physical Address
FFLTPARFlash ECC Fault Parity Register
Address
0x44004054
Reset
0x00000000
Access
read only
Size
32-bit
4 fields
Field
Bits
What it does
SECOUT
24:16
The Calculated Single Error Parity bits
DEDIN
15
The Overall Parity from Flash
SECIN
8:0
The Single Error Parity bits from Flash
DEDOUT
31
The Calculated Overall Parity used in Double Error Detection
BETA