CTRLAControl
- Address
0x44050000- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0SWRST
1 field
| Field | Bits | What it does |
|---|---|---|
| SWRST | 0 | Software Reset |
The 82 registers of GCLK (Generic Clock Generator), from 0x44050000, with their reset value and every field. The PIC32CZ4010CA90144 has 5988 registers in 67 peripherals, one page each.
0x440500000x00| Field | Bits | What it does |
|---|---|---|
| SWRST | 0 | Software Reset |
0x440500040x00000000| Field | Bits | What it does |
|---|---|---|
| GENCTRL15 | 17 | Generic Clock Generator Control 15 Synchronization Busy bit |
| GENCTRL14 | 16 | Generic Clock Generator Control 14 Synchronization Busy bit |
| GENCTRL13 | 15 | Generic Clock Generator Control 13 Synchronization Busy bit |
| GENCTRL12 | 14 | Generic Clock Generator Control 12 Synchronization Busy bit |
| GENCTRL11 | 13 | Generic Clock Generator Control 11 Synchronization Busy bit |
| GENCTRL10 | 12 | Generic Clock Generator Control 10 Synchronization Busy bit |
| GENCTRL9 | 11 | Generic Clock Generator Control 9 Synchronization Busy bit |
| GENCTRL8 | 10 | Generic Clock Generator Control 8 Synchronization Busy bit |
| GENCTRL7 | 9 | Generic Clock Generator Control 7 Synchronization Busy bit |
| GENCTRL6 | 8 | Generic Clock Generator Control 6 Synchronization Busy bit |
| GENCTRL5 | 7 | Generic Clock Generator Control 5 Synchronization Busy bit |
| GENCTRL4 | 6 | Generic Clock Generator Control 4 Synchronization Busy bit |
| GENCTRL3 | 5 | Generic Clock Generator Control 3 Synchronization Busy bit |
| GENCTRL2 | 4 | Generic Clock Generator Control 2 Synchronization Busy bit |
| GENCTRL1 | 3 | Generic Clock Generator Control 1 Synchronization Busy bit |
| GENCTRL0 | 2 | Generic Clock Generator Control 0 Synchronization Busy bit |
| SWRST | 0 | Software Reset Synchronization Busy bit |
0x440500200x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500240x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500280x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x4405002C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500300x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500340x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500380x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x4405003C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500400x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500440x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500480x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x4405004C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500500x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500540x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500580x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x4405005C0x00000000| Field | Bits | What it does |
|---|---|---|
| RUNSTDBY | 13 | Run in Standby |
| DIVSEL | 12 | Divide Selection
|
| OE | 11 | Output Enable |
| OOV | 10 | Output Off Value |
| IDC | 9 | Improve Duty Cycle |
| GENEN | 8 | Generic Clock Generator Enable |
| SRC | 3:0 | Source Select
|
| DIV | 31:16 | Division Factor |
0x440500800x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500840x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500880x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405008C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500900x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500940x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500980x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405009C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500A00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500A40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500A80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500AC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500B00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500B40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500B80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500BC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500C00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500C40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500C80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500CC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500D00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500D40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500D80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500DC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500E00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500E40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500E80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500EC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500F00x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500F40x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500F80x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440500FC0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501000x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501040x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501080x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405010C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501100x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501140x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501180x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405011C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501200x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501240x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501280x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405012C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501300x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501340x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501380x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405013C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501400x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501440x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501480x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405014C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501500x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501540x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501580x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405015C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501600x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501640x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501680x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405016C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501700x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501740x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x440501780x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|
0x4405017C0x00000000| Field | Bits | What it does |
|---|---|---|
| WRTLOCK | 7 | Write Lock |
| CHEN | 6 | Channel Enable |
| GEN | 3:0 | Generic Clock Generator
|