PIC32CZ4010CA90208 FPU registers

The 6 registers of FPU (Floating Point Unit), from 0xE000EF34, with their reset value and every field. The PIC32CZ4010CA90208 has 7010 registers in 78 peripherals, one page each.

FPU Floating Point Unit

FPCCRFloating-Point Context Control Register

Address: 0xE000EF34
Reset: 0xC0000000
Access: read/write
Size: 32-bit

9 fields

Field	Bits	What it does
LSPEN	30
MONRDY	8
BFRDY	6
MMRDY	5
HFRDY	4
THREAD	3
USER	1
LSPACT	0
ASPEN	31

FPCARFloating-Point Context Address Register

Address: 0xE000EF38
Reset: 0x00000000
Access: read/write
Size: 32-bit

1 field

Field	Bits	What it does
ADDRESS	31:3	Address for FP registers in exception stack frame

FPDSCRFloating-Point Default Status Control Register

Address: 0xE000EF3C
Reset: 0x00000000
Access: read/write
Size: 32-bit

4 fields

Field	Bits	What it does
AHP	26	Default value for FPSCR.AHP
DN	25	Default value for FPSCR.DN
FZ	24	Default value for FPSCR.FZ
RMODE	23:22	Default value for FPSCR.RMODE `0` Round to Nearest `1` Round towards Positive Infinity `2` Round towards Negative Infinity `3` Round towards Zero

MVFR0Media and FP Feature Register 0

Address: 0xE000EF40
Reset: 0x10110021
Access: read only
Size: 32-bit

8 fields

Field	Bits	What it does
Short_vectors	27:24
Square_root	23:20
Divide	19:16
FP_excep_trapping	15:12
Double_precision	11:8
Single_precision	7:4
A_SIMD_registers	3:0
FP_rounding_modes	31:28

MVFR1Media and FP Feature Register 1

Address: 0xE000EF44
Reset: 0x10000011
Access: read only
Size: 32-bit

4 fields

Field	Bits	What it does
FP_HPFP	27:24
D_NaN_mode	7:4
FtZ_mode	3:0
FP_fused_MAC	31:28

MVFR2Media and FP Feature Register 2

Address: 0xE000EF48
Reset: 0x00000040
Access: read only
Size: 32-bit