PIC32CZ8110CA90208 OSCCTRL registers

The 25 registers of OSCCTRL (Oscillators Control), from 0x44040000, with their reset value and every field. The PIC32CZ8110CA90208 has 7010 registers in 78 peripherals, one page each.

OSCCTRL Oscillators Control

EVCTRLEvent Control

Address
0x44040000
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
CFDEO0Clock Failure Detector Event Output Enable

INTENCLRInterrupt Enable Clear

Address
0x44040004
Reset
0x00000000
Access
read/write
Size
32-bit
11 fields
FieldBitsWhat it does
PLL1LOCKR26PLL 1 Lock Rise Interrupt Enable
PLL0LOCKR24PLL 0 Lock Rise Interrupt Enable
DFLLFAIL13DFLL Startup Failure Interrupt Enable
DFLLRCS12DFLL Reference Clock Stopped Interrupt Enable
DFLLUNF11DFLL Tuner Underflow Interrupt Enable
DFLLOVF10DFLL Tuner Overflow Interrupt Enable
DFLLLOCK9DFLL Lock Interrupt Enable
DFLLRDY8DFLL Ready Interrupt Enable
CLKFAIL2XOSC Clock Failure Interrupt Enable
XOSCFAIL1XOSC Startup Failure Interrupt Enable
XOSCRDY0XOSC Ready Interrupt Enable

INTENSETInterrupt Enable Set

Address
0x44040008
Reset
0x00000000
Access
read/write
Size
32-bit
11 fields
FieldBitsWhat it does
PLL1LOCKR26PLL 1 Lock Rise Interrupt Enable
PLL0LOCKR24PLL 0 Lock Rise Interrupt Enable
DFLLFAIL13DFLL Startup Failure Interrupt Enable
DFLLRCS12DFLL Reference Clock Stopped Interrupt Enable
DFLLUNF11DFLL Tuner Underflow Interrupt Enable
DFLLOVF10DFLL Tuner Overflow Interrupt Enable
DFLLLOCK9DFLL Lock Interrupt Enable
DFLLRDY8DFLL Ready Interrupt Enable
CLKFAIL2XOSC Clock Failure Interrupt Enable
XOSCFAIL1XOSC Startup Failure Interrupt Enable
XOSCRDY0XOSC Ready Interrupt Enable

INTFLAGInterrupt Flag Status and Clear

Address
0x4404000C
Reset
0x00000000
Access
read/write
Size
32-bit
11 fields
FieldBitsWhat it does
PLL1LOCKR26PLL 1 Lock Rise
PLL0LOCKR24PLL 0 Lock Rise
DFLLFAIL13DFLL Startup Failure
DFLLRCS12DFLL Reference Clock Stopped
DFLLUNF11DFLL Tuner Underflow
DFLLOVF10DFLL Tuner Overflow
DFLLLOCK9DFLL Lock
DFLLRDY8DFLL Ready
CLKFAIL2XOSC Clock Failure
XOSCFAIL1XOSC Startup Failure
XOSCRDY0XOSC Ready

STATUSStatus

Address
0x44040010
Reset
0x00000000
Access
read only
Size
32-bit
12 fields
FieldBitsWhat it does
PLL1LOCK25PLL 1 Lock
PLL0LOCK24PLL 0 Lock
DFLLFAIL13DFLL Startup Failure
DFLLRCS12DFLL Reference Clock Stopped
DFLLUNF11DFLL Tuner Underflow
DFLLOVF10DFLL Tuner Overflow
DFLLLOCK9DFLL Lock
DFLLRDY8DFLL Ready
XOSCCKSW3XOSC Clock Switch
CLKFAIL2XOSC Clock Failure
XOSCFAIL1XOSC Startup Failure
XOSCRDY0XOSC Ready

XOSCCTRLAExternal Multipurpose Crystal Oscillator Control A

Address
0x44040014
Reset
0x00000D00
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
USBHSDIV25:24USBHS Referrence Clock Division
  • 0 USBHS PLL reference XOSC clock is disabled
  • 1 USBHS PLL reference XOSC clock is divided by 1
  • 2 USBHS PLL reference XOSC clock is divided by 2
  • 3 USBHS PLL reference XOSC clock is divided by 4
CFDPRESC19:16Clock Failure Detector Prescaler
  • 0 48 MHz
  • 1 24 MHz
  • 2 12 MHz
  • 3 6 MHz
  • 4 3 MHz
  • 5 1.5 MHz
  • 6 0.75 MHz
  • 7 0.3125 MHz
STARTUP11:8Start-Up Time
  • 0 31 us
  • 1 61 us
  • 2 122 us
  • 3 244 us
  • 4 488 us
  • 5 977 us
  • 6 1953 us
  • 7 3906 us
  • 8 7813 us
  • 9 15625 us
  • 10 31250 us
  • 11 62500 us
  • 12 125000 us
  • 13 250000 us
  • 14 500000 us
  • 15 1000000 us
ONDEMAND7On Demand Control
SWBEN5Xosc Clock Switch Back Enable
CFDEN4Clock Failure Detector Enable
XTALEN3Crystal Oscillator Enable
AGC2Auto Gain Control Loop Enable
ENABLE1Oscillator Enable
WRTLOCK31Write Lock for CTRLA register

XOSCCTRLBExternal Multipurpose Crystal Oscillator Control B

Address
0x44040018
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
USRCFG7:0User Configuration Control Bits
WRTLOCK31Write Lock for CTRLB register

DFLLCTRLADFLL48M Control A

Address
0x4404002C
Reset
0x00000082
Access
read/write
Size
32-bit
4 fields
FieldBitsWhat it does
ONDEMAND7On Demand Control
LOWFREQ3Low Frequency Mode
WRTLOCK2Write Lock
ENABLE1DFLL Enable

DFLLCTRLBDFLL48M Control B

Address
0x44040030
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
FieldBitsWhat it does
WAITLOCK7Wait Lock
QLDIS5Quick Lock Disable
CCDIS4Chill Cycle Disable
USBCRM3USB Clock Recovery Mode
LLAW2Lose Lock After Wake
STABLE1Stable DFLL Frequency
LOOPEN0Operating Mode Selection

DFLLTUNEDFLL48M Tune

Address
0x44040034
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
TUNE6:0Tune Value

DFLLDIFFDFLL48M Diff

Address
0x44040038
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
DIFF15:0Multiplication Ratio Difference

DFLLMULDFLL48M Multiplier

Address
0x4404003C
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
STEP22:16Tune Maximum Step
MUL15:0DFLL Multiply Factor

PLL0CTRLPLL Control

Address
0x44040040
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
FieldBitsWhat it does
BWSEL13:11Bandwidth selection
  • 0 TBD
  • 1 TBD
  • 2 TBD
  • 3 TBD
  • 4 TBD
  • 5 TBD
  • 6 TBD
  • 7 TBD
REFSEL10:8Reference selection
  • 0 Dedicated GCLK clock reference
  • 1 XOSC clock reference
  • 2 DFLL48M clock reference
ONDEMAND7On Demand Control
WRTLOCK2Write Lock
ENABLE1PLL Enable

PLL0FBDIVPLL Feed-Back Divider

Address
0x44040044
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
FBDIV9:0PLL Feed-Back Divider Factor

PLL0REFDIVPLL reference divider

Address
0x44040048
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
REFDIV5:0PLL reference division factor

PLL0POSTDIVAPLL output clock divider A

Address
0x4404004C
Reset
0x20202020
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
POSTDIV329:24PLL output 0 clock division factor
OUTEN223PLL output 0 enable
POSTDIV221:16PLL output 0 clock division factor
OUTEN115PLL output 0 enable
POSTDIV113:8PLL output 0 clock division factor
OUTEN07PLL output 0 enable
POSTDIV05:0PLL output 0 clock division factor
OUTEN331PLL output 0 enable

PLL1CTRLPLL Control

Address
0x44040054
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
FieldBitsWhat it does
BWSEL13:11Bandwidth selection
  • 0 TBD
  • 1 TBD
  • 2 TBD
  • 3 TBD
  • 4 TBD
  • 5 TBD
  • 6 TBD
  • 7 TBD
REFSEL10:8Reference selection
  • 0 Dedicated GCLK clock reference
  • 1 XOSC clock reference
  • 2 DFLL48M clock reference
ONDEMAND7On Demand Control
WRTLOCK2Write Lock
ENABLE1PLL Enable

PLL1FBDIVPLL Feed-Back Divider

Address
0x44040058
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
FBDIV9:0PLL Feed-Back Divider Factor

PLL1REFDIVPLL reference divider

Address
0x4404005C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
REFDIV5:0PLL reference division factor

PLL1POSTDIVAPLL output clock divider A

Address
0x44040060
Reset
0x20202020
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
POSTDIV329:24PLL output 0 clock division factor
OUTEN223PLL output 0 enable
POSTDIV221:16PLL output 0 clock division factor
OUTEN115PLL output 0 enable
POSTDIV113:8PLL output 0 clock division factor
OUTEN07PLL output 0 enable
POSTDIV05:0PLL output 0 clock division factor
OUTEN331PLL output 0 enable

FRACDIV0Fractional Divider

Address
0x4404006C
Reset
0x00200000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
INTDIV30:16Frequency division factor integer part
REMDIV15:7Frequency division factor reminder part

FRACDIV1Fractional Divider

Address
0x44040074
Reset
0x00200000
Access
read/write
Size
32-bit
2 fields
FieldBitsWhat it does
INTDIV30:16Frequency division factor integer part
REMDIV15:7Frequency division factor reminder part

SYNCBUSYSynchronization Busy

Address
0x44040078
Reset
0x00000000
Access
read only
Size
32-bit
7 fields
FieldBitsWhat it does
FRACDIV17FRACDIV1 Synchronization Busy
FRACDIV06FRACDIV0 Synchronization Busy
DFLLMUL5DFLLMUL Synchronization Busy
DFLLDIFF4DFLLDIFF Synchronization Busy
DFLLTUNE3DFLLTUNE Synchronization Busy
DFLLCTRLB2DFLLCTRLB Synchronization Busy
DFLLENABLE1DFLL48M ENABLE Synchronization Busy

XOSCCALXOSC Calibration Register

Address
0x44040080
Reset
0x00000000
Access
read/write
Size
32-bit
10 fields
FieldBitsWhat it does
CAL15:0XOSC Calibration
SPARES15:10Spare bits
REDOSC9reduce oscillation debug counter
REDGAIN8reduce gain control timer
FLIPPOL7flip output clock polarity
CMSEL6clock buffer common mode selection
HYST5loop hysteresis control
ENVAMP4:3envelope amplitude at osci
KICKEREN2Kicker enable
FTRANS1:0Fine Transconductance programmability for Oscillator

RC48MCAL0RC48M Calibration 0

Address
0x44040088
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
cmp_pwr_ctrl22:20Comparator power control
cmp_8m_lp19Comparator 8MHz low-power
ldo_vout_boost18LDO VOUT boost
out_buf_sel17Output buffer select
iosc_boost16IOSC boost
proc_trim_mv13:6Proc trim value
temp_trim_mv5:0Temp trim value
CAL31:0RC48M Calibration