PIC32MK0128MCA032 CTMU registers The 1 register of CTMU (Charge time measurement unit), from 0xBF82D000, with their reset value and every field. The PIC32MK0128MCA032 has 771 registers in 65 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
CTMU Charge time measurement unit CTMUCONCTMU Control Register
Address 0xBF82D000
Reset 0x00000000
Access read/write
Size 32-bit 17 fields
Field Bits What it does EDG1POL 30 Edge 1 Polarity Select bit0 Edge1 programmed for a negative edge response1 Edge1 programmed for a positive edge response EDG1SEL 29:26 Edge 1 Source Select bits0 Timer1 Event is selected1 OC1 Compare Event is selected2 CTED2 pin is selected3 CTED1 pin is selected4 CTED3 pin is selected5 CTED4 pin is selected6 CTED5 pin is selected7 CTED6 pin is selected8 CTED7 pin is selected9 CTED8 pin is selected10 IC1 Capture Event is selected11 IC2 Capture Event is selected12 IC3 Capture Event is selected13 C1OUT pin is selected14 C2OUT pin is selected15 IC4 Capture Event is selected EDG2STAT 25 Edge2 Status bit0 Edge2 has not occurred1 Edge2 has occurred EDG1STAT 24 Edge1 Status bit0 Edge1 has not occurred1 Edge1 has occurred EDG2MOD 23 Edge2 Edge Sampling Select bit0 Input is level-sensitive1 Input is edge-sensitive EDG2POL 22 Edge 2 Polarity Select bit0 Edge2 programmed for a negative edge response1 Edge2 programmed for a positive edge response EDG2SEL 21:18 Edge 2 Source Select bits0 Timer1 Event is selected1 OC1 Compare Event is selected2 CTED2 pin is selected3 CTED1 pin is selected4 CTED9 pin is selected5 CTED10 pin is selected6 CTED11 pin is selected7 CTED12 pin is selected8 CTED13 pin is selected9 IC1 Capture Event is selected10 IC2 Capture Event is selected11 IC3 Capture Event is selected12 PBCLK clock is selected13 C1OUT pin is selected14 C2OUT pin is selected15 IC4 Capture Event is selected ON 15 ON Enable bit0 Module is disabled1 Module is enabled CTMUSIDL 13 TGEN 12 Time Generation Enable bit0 Disables edge delay generation1 Enables edge delay generation EDGEN 11 Edge Enable bit0 Edges are blocked1 Edges are not blocked EDGSEQEN 10 Edge Sequence Enable bit0 No edge sequence is needed1 Edge1 must occur before Edge2 can occur IDISSEN 9 Analog Current Source Control bit0 Analog current source output is not grounded1 Analog current source output is grounded CTTRIG 8 Trigger Control bit0 Trigger output is disabled1 Trigger output is enabled ITRIM 7:2 Current Source Trim bits0 Nominal current output specified by IRNG1 Minimum positive change from nominal current31 Maximum positive change from nominal current33 Maximum negative change from nominal current63 Minimum negative change from nominal current IRNG 1:0 Current Range Select bits0 1000 times base current1 Base current level2 10 times base current3 100 times base current EDG1MOD 31 Edge1 Edge Sampling Select bit0 Input is level-sensitive1 Input is edge-sensitive
BETA