The 4 registers of RCON (Reset control), from 0xBF801240, with their reset value and every field. The PIC32MK0256GPG064 has 963 registers in 82 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
RCON Reset control
RCONReset Control Register
Address
0xBF801240
Reset
0x00000000
Access
read/write
Size
32-bit
16 fields
Field
Bits
What it does
PORCORE
30
BCFGERR
27
Primary Configuration Registers Error Flag bit
0 No error occurred during a read of the primary configuration registers
1 An error occurred during a read of the primary configuration registers
BCFGFAIL
26
Primary/Secondary Configuration Registers Error Flag bit
0 No error occurred during a read of the primary and alternate configuration registers
1 An error occurred during a read of the primary and alternate configuration registers
VBPOR
17
VBAT
16
DPSLP
10
CMR
9
Configuration Mismatch Reset Flag bit
0 A Configuration Mismatch Reset has not occurred
1 A Configuration Mismatch Reset has occurred
EXTR
7
External Reset (MCLR) Pin Flag bit
0 Master Clear (pin) Reset has not occurred
1 Master Clear (pin) Reset has occurred
SWR
6
Software Reset Flag bit
0 Software Reset was not executed
1 Software Reset was executed
DMTO
5
Deadman Timer Time-out Flag bit
0 A DMT time-out has not occurred
1 A DMT time-out has occurred
WDTO
4
Watchdog Timer Time-out Flag bit
0 WDT Time-out has not occurred
1 WDT Time-out has occurred
SLEEP
3
Wake From Sleep Flag bit
0 Device was not in Sleep mode
1 Device was in Sleep mode
IDLE
2
Wake From Idle Flag bit
0 Device was not in Idle mode
1 Device was in Idle mode
BOR
1
Brown-out Reset Flag bit
0 Brown-out Reset has not occurred
1 Brown-out Reset has occurred
POR
0
Power-on Reset Flag bit
0 Power-on Reset has not occurred
1 Power-on Reset has occurred
PORIO
31
RSWRSTSoftware Reset Register
Address
0xBF801250
Reset
0x00000000
Access
write only
Size
32-bit
1 field
Field
Bits
What it does
SWRST
0
Software Reset Trigger bit
0 No effect
1 Enable software Reset event
RNMICONNon-maskable Interrupt (NMI) Control Register
Address
0xBF801260
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
Field
Bits
What it does
DMTO
25
Deadman Timer Time-out Flag bit
0 DMT time-out has not occurred
1 DMT time-out has occurred and caused a NMI
WDTO
24
Watchdog Timer Time-Out Flag bit
0 WDT time-out has not occurred
1 WDT time-out has occurred and caused a NMI
SWNMI
23
Software NMI Trigger
0 An NMI will not be generated
1 An NMI will be generated
GNMI
19
General NMI bit
0 A general NMI event has not been detected
1 A general NMI event has been detected or a user-initiated NMI event has occurred
HLVD
18
High/Low-Voltage Detect Status
CF
17
Clock Fail Detect bit
0 FSCM has not detected clock failure
1 FSCM has detected clock failure and caused an NMI
WDTS
16
NMICNT
15:0
NMI Reset Counter Value bits
0 No delay between NMI assertion and device Reset event
1 1 SYSCLK cycle before a device Reset occurs
65535 65535 SYSCLK cycles before a device Reset occurs