PIC32MK0512GPG064 PORTC registers

The 14 registers of PORTC (I/O port C), from 0xBF860200, with their reset value and every field. The PIC32MK0512GPG064 has 963 registers in 82 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

PORTC I/O port C

ANSELC

Address: 0xBF860200
Reset: 0x00001C07
Access: read/write
Size: 32-bit

6 fields

Field	Bits	What it does
ANSC12	12
ANSC11	11
ANSC10	10
ANSC2	2
ANSC1	1
ANSC0	0

TRISC

Address: 0xBF860210
Reset: 0x0000FFC7
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
TRISC15	15
TRISC14	14
TRISC13	13
TRISC12	12
TRISC11	11
TRISC10	10
TRISC9	9
TRISC8	8
TRISC7	7
TRISC6	6
TRISC2	2
TRISC1	1
TRISC0	0

PORTC

Address: 0xBF860220
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
RC15	15
RC14	14
RC13	13
RC12	12
RC11	11
RC10	10
RC9	9
RC8	8
RC7	7
RC6	6
RC2	2
RC1	1
RC0	0

LATC

Address: 0xBF860230
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
LATC15	15
LATC14	14
LATC13	13
LATC12	12
LATC11	11
LATC10	10
LATC9	9
LATC8	8
LATC7	7
LATC6	6
LATC2	2
LATC1	1
LATC0	0

ODCC

Address: 0xBF860240
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
ODCC15	15
ODCC14	14
ODCC13	13
ODCC12	12
ODCC11	11
ODCC10	10
ODCC9	9
ODCC8	8
ODCC7	7
ODCC6	6
ODCC2	2
ODCC1	1
ODCC0	0

CNPUC

Address: 0xBF860250
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNPUC15	15
CNPUC14	14
CNPUC13	13
CNPUC12	12
CNPUC11	11
CNPUC10	10
CNPUC9	9
CNPUC8	8
CNPUC7	7
CNPUC6	6
CNPUC2	2
CNPUC1	1
CNPUC0	0

CNPDC

Address: 0xBF860260
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNPDC15	15
CNPDC14	14
CNPDC13	13
CNPDC12	12
CNPDC11	11
CNPDC10	10
CNPDC9	9
CNPDC8	8
CNPDC7	7
CNPDC6	6
CNPDC2	2
CNPDC1	1
CNPDC0	0

CNCONCChange Notice control for PORTx Register

Address: 0xBF860270
Reset: 0x00000000
Access: read/write
Size: 32-bit

2 fields

Field	Bits	What it does
ON	15	Change Notice Control ON bit `0` CN is disabled `1` CN is enabled
EDGEDETECT	11	Change Notification Style bit `0` Mismatch Style. Detect change from last PORTx read (CNSTATx used for CN Event). `1` Edge Style. Detect edge transitions (CNFx used for CN Event).

CNENC

Address: 0xBF860280
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNIEC15	15
CNIEC14	14
CNIEC13	13
CNIEC12	12
CNIEC11	11
CNIEC10	10
CNIEC9	9
CNIEC8	8
CNIEC7	7
CNIEC6	6
CNIEC2	2
CNIEC1	1
CNIEC0	0

CNSTATC

Address: 0xBF860290
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNSTATC15	15
CNSTATC14	14
CNSTATC13	13
CNSTATC12	12
CNSTATC11	11
CNSTATC10	10
CNSTATC9	9
CNSTATC8	8
CNSTATC7	7
CNSTATC6	6
CNSTATC2	2
CNSTATC1	1
CNSTATC0	0

CNNEC

Address: 0xBF8602A0
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNNEC15	15
CNNEC14	14
CNNEC13	13
CNNEC12	12
CNNEC11	11
CNNEC10	10
CNNEC9	9
CNNEC8	8
CNNEC7	7
CNNEC6	6
CNNEC2	2
CNNEC1	1
CNNEC0	0

CNFC

Address: 0xBF8602B0
Reset: 0x00000000
Access: read/write
Size: 32-bit

13 fields

Field	Bits	What it does
CNFC15	15
CNFC14	14
CNFC13	13
CNFC12	12
CNFC11	11
CNFC10	10
CNFC9	9
CNFC8	8
CNFC7	7
CNFC6	6
CNFC2	2
CNFC1	1
CNFC0	0

SRCON0C

Address: 0xBF8602C0
Reset: 0x00000000
Access: read/write
Size: 32-bit

6 fields

Field	Bits	What it does
SR0C15	15
SR0C11	11
SR0C9	9
SR0C8	8
SR0C7	7
SR0C6	6

SRCON1C

Address: 0xBF8602D0
Reset: 0x00000000
Access: read/write
Size: 32-bit

6 fields

Field	Bits	What it does
SR1C15	15
SR1C11	11
SR1C9	9
SR1C8	8
SR1C7	7
SR1C6	6