PIC32MK1024GPD064 CMP3 registers

The 1 register of CMP3 (Comparator 3), from 0xBF82C050, with their reset value and every field. The PIC32MK1024GPD064 has 1106 registers in 106 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

CMP3 Comparator 3

CM3CONOp amp/Comparator 'x' Control Register ('x' = 1-5)

Address
0xBF82C050
Reset
0x00000000
Access
read/write
Size
32-bit
13 fields
FieldBitsWhat it does
CFSEL22:20Comparator Output Filter Clock Source Select bits
  • 0 SYSCLK Clock
  • 1 PPBCLK2 Clock
  • 2 PWM Secondary Special Event
  • 3 REFCLK3 Clock
  • 4 PBCLK2/Timer2 Period Value (PR2)
  • 5 PBCLK2/Timer3 Period Value (PR3)
  • 6 PBCLK2/Timer4 Period Value (PR4)
  • 7 PBCLK2/Timer5 Period Value (PR5)
CFLTREN19Comparator Output Digital Filter Enable bit
  • 0 Digital Filters disabled
  • 1 Digital Filters enabled
CFDIV18:16Comparator Output Filter Clock Divide Select bits
  • 0 1:1 Clock Divide
  • 1 1:2 Clock Divide
  • 2 1:4 Clock Divide
  • 3 1:8 Clock Divide
  • 4 1:16 Clock Divide
  • 5 1:32 Clock Divide
  • 6 1:64 Clock Divide
  • 7 1:128 Clock Divide
ON15Comparator Enable bit
  • 0 Comparator is disabled
  • 1 Comparator is enabled
COE14Comparator Output Enable bit
  • 0 Comparator output is internal only
  • 1 Comparator output is present on the CxOUT pin
CPOL13Comparator Output Polarity Select bit
  • 0 Comparator output is not inverted
  • 1 Comparator output is inverted
OAO11Op amp Output Enable bit
  • 0 Op amp output is not present on the OAxOUT pin
  • 1 Op amp output is present on the OAxOUT pin
AMPMOD10Op amp Mode Enable bit
  • 0 Amplifier/Comparator operating in Comparator-only mode
  • 1 Amplifier/Comparator operating in Dual mode (both Op amps and Comparators are enabled)
CEVT9
COUT8Comparator Output bit
  • 0 (When CPOL is 0)VIN+ VTH+
  • 1 (When CPOL is 0)VIN+ > VTH+ / (When CPOL is 1) VIN+ VTH+ / (When CPOL is 1) VIN+ < VTH-
EVPOL7:6Trigger/Event Polarity Select bits
  • 0 Trigger/Event generation is disabled
  • 1 (If CPOL is 0) Low-to-high transition of the comparator output / (If CPOL is 1) High-to-low transition of the comparator output
  • 2 (If CPOL is 0) High-to-low transition of the comparator output / (If CPOL is 1) Low-to-high transition of the comparator output
  • 3 Trigger/Event generated on any change of the comparator output
CREF4Op amp/Comparator Reference Select bit
  • 0 VIN+ input connects to CxIN1+ pin
  • 1 VIN+ input connects to internal CDAC3 output voltage
CCH1:0Comparator Channel Select bits
  • 0 CxIN1-
  • 1 CxIN2-
  • 2 CxIN3-
  • 3 CxIN4-