The 4 registers of EEPROM (EEPROM), from 0xBF829000, with their reset value and every field. The PIC32MK1024GPK064 has 1153 registers in 106 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
EEPROM EEPROM
EECONEEPROM Control Register
Address
0xBF829000
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
Field
Bits
What it does
ON
15
Data EEPROM Power Control bit
0 Data EEPROM is disabled
1 Data EEPROM is enabled
RDY
14
Data EEPROM Ready bit
0 Data EEPROM is not ready for access
1 Data EEPROM is ready for access
SIDL
13
Stop in Idle Mode bit
0 Continue operation in Idle mode
1 Discontinue operation when CPU enters in Idle mode
ABORT
12
Data EEPROM Abort Operation Control bit
0 Data EEPROM panel is ready/Normal operation
1 Set by software to abort the on-going write command as soon as possible
RW
7
Start Command Execution Control bit
0 (When WREN is 1)Cleared by hardware to indicate program or erase operation has completed / (When WREN is 0)Cleared by hardware to indicate read operation has completed
1 (When WREN is 1)Start memory word program or erase command / (When WREN is 0)Start memory word read command
WREN
6
Data EEPROM Write Enable Control bit
0 Disables program or erase of memory elements, and enables read operations
1 Enables program or erase operations
ERR
5:4
Data EEPROM Sequence Error Status bits
0 No error condition
1 A Bulk or Page Erase or a Word Program verify error has occurred
2 An attempted execution of a read or write operation with an invalid write OR command with a misaligned address
3 A BOR event has occurred
ILW
3
Data EEPROM Imminent Long Write Status bit
0 The next write to the EEPROM address (held in the EEADDR register) will be a normal write cycle
1 The next write to the EEPROM address (held in the EEADDR register) will require more time (~ 20 ms) than usual
CMD
2:0
Data EEPROM Command Selection bits
0 Word Read command (WREN bit must be clear)
1 Word Write command (WREN bit must be set)
2 Data EEPROM memory Page Erase command (WREN bit must be set)
3 Data EEPROM memory Bulk Erase command (WREN bit must be set)
4 Configuration register Write command (WREN bit must be set)
BETA