PIC32MK1024MCF064 QEI5 registers

The 13 registers of QEI5 (Quadrature encoder 5), from 0xBF82BA00, with their reset value and every field. The PIC32MK1024MCF064 has 1848 registers in 120 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

QEI5 Quadrature encoder 5

QEI5CONQEIx Control Register

Address
0xBF82BA00
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
QEIEN15Quadrature Encoder Interface Module Counter Enable bit
  • 0 Module counters are disabled
  • 1 Module counters are enabled
QEISIDL13Stop in Idle Mode bit
  • 0 Continue module operation in Idle mode
  • 1 Discontinue module operation when device enters Idle mode
PIMOD12:10Position Counter Initialization Mode Select bits
  • 0 Index input event does not affect position counter
  • 1 Every Index input event resets the position counter
  • 2 Next index input event initializes the position counter with contents of QEIxICCH register
  • 3 First index event after home event initializes position counter with contents of QEIxICCH register
  • 4 Second index event after home event initializes position counter with contents of QEIxICCHregister
  • 5 Resets the position counter when the position counter equals QEIxICCH register
  • 6 Modulo Count mode for position counter
  • 7 Modulo Count mode for position counter and every index event resets the position counter
IMV9:8Index Match Value bits
  • 0 Index match occurs when QEB is 0 and QEA is 0
  • 1 Index match occurs when QEB is 0 and QEA is 1
  • 2 Index match occurs when QEB is 1 and QEA is 0
  • 3 Index match occurs when QEB is 1 and QEA is 1
INTDIV6:4Timer Input Clock Prescale Select bits
  • 0 1:1 prescale value
  • 1 1:2 prescale value
  • 2 1:4 prescale value
  • 3 1:8 prescale value
  • 4 1:16 prescale value
  • 5 1:32 prescale value
  • 6 1:64 prescale value
  • 7 1:128 prescale value
CNTPOL3Position and Index Counter/Timer Direction Select bit
  • 0 Counter direction is positive unless modified by external Up/Down signal
  • 1 Counter direction is negative unless modified by external Up/Down signal
GATEN2External Count Gate Enable bit
  • 0 External gate signal does not affect position counter/timer operation
  • 1 External gate signal controls position counter operation
CCM1:0Counter Control Mode Selection bits
  • 0 Quadrature Encoder Interface Count mode (x4 mode)
  • 1 QEA is the external clock input. QEB High is Count Up, QEB Low is Count Down
  • 2 QEA is the external clock input. QEB High is Clock Run, QEB Low is Clock Stop
  • 3 Internal Timer Mode. QEB High is Timer Run, QEB Low is Timer Stop

QEI5IOCQEIx I/O Control Register

Address
0xBF82BA10
Reset
0x00000000
Access
read/write
Size
32-bit
14 fields
FieldBitsWhat it does
HCAPEN16Position Counter Input Capture by Home Event Enable bit
  • 0 HOMEx input event (positive edge) does not trigger a position capture event
  • 1 HOMEx input event (positive edge) triggers a position capture event
QCAPEN15Position Counter Input Capture Enable bit
  • 0 Home input event (positive edge) does not trigger a capture even
  • 1 Positive edge detect of Home input triggers position capture function
FLTREN14QEA/QEB/INDX/HOMEx Digital Filter Enable bit
  • 0 Input Pin Digital filter is disabled (bypassed)
  • 1 Input Pin Digital filter is enabled
QFDIV13:11QEA/QEB/INDX/HOMEx Digital Input Filter Clock Divide Select bits
  • 0 1:1 clock divide
  • 1 1:2 clock divide
  • 2 1:4 clock divide
  • 3 1:8 clock divide
  • 4 1:16 clock divide
  • 5 1:32 clock divide
  • 6 1:64 clock divide
  • 7 1:128 clock divide
OUTFNC10:9QEI Module Output Function Mode Select bits
  • 0 Output is disabled
  • 1 The CNTCMPx pin goes high when POSxCNT QEIxICCH
  • 2 The CNTCMPx pin goes high when POSxCNT QEIxCMPL
  • 3 The CNTCMPx pin goes high when POSxCNT QEIxCMPL or POSxCNT QEIxICCH
SWPAB8Swap QEA and QEB Inputs bit
  • 0 QEAx and QEBx are not swapped
  • 1 QEAx and QEBx are swapped prior to quadrature decoder logic
HOMPOL7HOMEx Input Polarity Select bit
  • 0 Input is not inverted
  • 1 Input is inverted
IDXPOL6INDXx Input Polarity Select bit
  • 0 Input is not inverted
  • 1 Input is inverted
QEBPOL5QEBx Input Polarity Select bit
  • 0 Input is not inverted
  • 1 Input is inverted
QEAPOL4QEAx Input Polarity Select bit
  • 0 Input is not inverted
  • 1 Input is inverted
HOME3Status of HOMEx Input Pin after Polarity Control bit
  • 0 (if HOMPOL bit is set to 0) Pin is at logic 0 / (if HOMPOL bit is set to 1) Pin is at logic 1
  • 1 (if HOMPOL bit is set to 0) Pin is at logic 1 / (if HOMPOL bit is set to 1) Pin is at logic 0
INDEX2Status of INDXx Input Pin after Polarity Control bit
  • 0 (if IDXPOL bit is set to 0) Pin is at logic 0 / (if IDXPOL bit is set to 1) Pin is at logic 1
  • 1 (if IDXPOL bit is set to 0) Pin is at logic 1 / (if IDXPOL bit is set to 1) Pin is at logic 0
QEB1Status of QEBx Input Pin after Polarity Control and SWPAB Pin Swapping bit
  • 0 see datasheet
  • 1 see datasheet
QEA0Status of QEAx Input Pin after Polarity Control and SWPAB Pin Swapping bit
  • 0 see datasheet
  • 1 see datasheet

QEI5STATQEIx Status Register

Address
0xBF82BA20
Reset
0x00000000
Access
read/write
Size
32-bit
14 fields
FieldBitsWhat it does
PCHEQIRQ13Position Counter Greater Than or Equal Compare Status bit
  • 0 POSxCNT < QEIxICCH
  • 1 POSxCNT
PCHEQIEN12Position Counter Greater Than or Equal Compare Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
PCLEQIRQ11Position Counter Less Than or Equal Compare Status bit
  • 0 POSxCNT > QEIxCMPL
  • 1 POSxCNT
PCLEQIEN10Position Counter Less Than or Equal Compare Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
POSOVIRQ9Position Counter Overflow Status bit
  • 0 No overflow has occurred
  • 1 Overflow has occurred
POSOVIEN8Position Counter Overflow Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
PCIIRQ7Position Counter Initialization Process Complete Status bit
  • 0 POSxCNT was not reinitialized
  • 1 POSxCNT was reinitialized
PCIIEN6Position Counter Initialization Process Complete Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
VELOVIRQ5Velocity Counter Overflow Status bit
  • 0 No overflow has not occurred
  • 1 Overflow has occurred
VELOVIEN4Velocity Counter Overflow Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
HOMIRQ3Status Flag for Home Event Status bit
  • 0 No Home event has occurred
  • 1 Home event has occurred
HOMIEN2Home Input Event Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled
IDXIRQ1Status Flag for Index Event Status bit
  • 0 No Index event has occurred
  • 1 Index event has occurred
IDXIEN0Index Input Event Interrupt Enable bit
  • 0 Interrupt is disabled
  • 1 Interrupt is enabled

POS5CNTPosition Counter Register

Address
0xBF82BA30
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
POSCNT31:0

POS5HLD

Address
0xBF82BA40
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
POSHLD31:0

VEL5CNTVelocity Counter Register

Address
0xBF82BA50
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
VELCNT31:0

VEL5HLDVelocity Hold Register

Address
0xBF82BA60
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
VELHLD31:0

INT5TMRInterval Timer Register

Address
0xBF82BA70
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
INTTMR31:0

INT5HLDInterval Timer Hold Register

Address
0xBF82BA80
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
INTHLD31:0

INDX5CNT

Address
0xBF82BA90
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
INDXCNT31:0

INDX5HLD

Address
0xBF82BAA0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
INDXHLD31:0

QEI5ICCQEIx Initialize/Capture/Compare Register

Address
0xBF82BAB0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
QEIICC31:0

QEI5CMPLCapture Low Register

Address
0xBF82BAC0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
QEICMPL31:0