The 4 registers of RCON (Reset control), from 0xBF801240, with their reset value and every field. The PIC32MK1024MCF100 has 1917 registers in 121 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
RCON Reset control
RCONReset Control Register
Address
0xBF801240
Reset
0x00000000
Access
read/write
Size
32-bit
14 fields
Field
Bits
What it does
PORCORE
30
Core Voltage POR Flag bit
0 A Power-up Reset has not occurred due to Core Voltage
1 A Power-up Reset has occurred due to Core Voltage
VBPOR
17
VBPOR Mode Flag bit
0 A VBAT domain POR has not occurred
1 A VBAT domain POR has occurred
VBAT
16
VBAT Mode Flag bit
0 A POR exit from VBAT has not occurred
1 A POR exit from VBAT has occurred (a true POR must be established with the valid VBAT voltage on the VBAT pin)
DPSLP
10
Deep Sleep Mode Flag bit
0 Deep Sleep mode has not occurred
1 Deep Sleep mode has occurred
CMR
9
Configuration Mismatch Reset Flag bit
0 A Configuration Mismatch Reset has not occurred
1 A Configuration Mismatch Reset has occurred
EXTR
7
External Reset (MCLR) Pin Flag bit
0 Master Clear (pin) Reset has not occurred
1 Master Clear (pin) Reset has occurred
SWR
6
Software Reset Flag bit
0 Software Reset was not executed
1 Software Reset was executed
DMTO
5
Deadman Timer Time-out Flag bit
0 A DMT time-out has not occurred
1 A DMT time-out has occurred
WDTO
4
Watchdog Timer Time-out Flag bit
0 WDT Time-out has not occurred
1 WDT Time-out has occurred
SLEEP
3
Wake From Sleep Flag bit
0 Device was not in Sleep mode
1 Device was in Sleep mode
IDLE
2
Wake From Idle Flag bit
0 Device was not in Idle mode
1 Device was in Idle mode
BOR
1
Brown-out Reset Flag bit
0 Brown-out Reset has not occurred
1 Brown-out Reset has occurred
POR
0
Power-on Reset Flag bit
0 Power-on Reset has not occurred
1 Power-on Reset has occurred
PORIO
31
I/O Voltage POR Flag bit
0 A Power-up Reset has not occurred due to I/O Voltage
1 A Power-up Reset has occurred due to I/O Voltage
RSWRSTSoftware Reset Register
Address
0xBF801250
Reset
0x00000000
Access
write only
Size
32-bit
1 field
Field
Bits
What it does
SWRST
0
Software Reset Trigger bit
0 No effect
1 Enable software Reset event
RNMICONNon-Maskable Interrupt (NMI) Control Register
Address
0xBF801260
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
Field
Bits
What it does
DMTO
25
Deadman Timer Time-out Flag bit
0 DMT time-out has not occurred
1 DMT time-out has occurred and caused a NMI
WDTO
24
Watchdog Timer Time-Out Flag bit
0 WDT time-out has not occurred
1 WDT time-out has occurred and caused a NMI
SWNMI
23
Software NMI Trigger.
0 An NMI will not be generated
1 An NMI will be generated
GNMI
19
General NMI bit
0 A general NMI event has not been detected
1 A general NMI event has been detected or a user-initiated NMI event has occurred
HLVD
18
CF
17
Clock Fail Detect bit
0 FSCM has not detected clock failure
1 FSCM has detected clock failure and caused an NMI
WDTS
16
Watchdog Timer Time-out in Sleep Mode Flag bit (Setting this bit will cause a WDT NMI)
0 WDT time-out has not occurred during Sleep mode
1 WDT time-out has occurred during Sleep mode and caused a wake-up from sleep
NMICNT
15:0
NMI Reset Counter Value bits
0 No delay between NMI assertion and device Reset event
1 1 SYSCLK cycle before a device Reset occurs
254 254 SYSCLK cycles before a device Reset occurs
255 255 SYSCLK cycles before a device Reset occurs
PWRCONPower Control Register
Address
0xBF801270
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
Field
Bits
What it does
VREGRUN
7:6
VREGSLP
5:4
VREGS
0
Internal Voltage Regulator Stand-by Enable bit
0 Voltage regulator will go to Stand-by mode during Sleep
1 Voltage regulator will remain active during Sleep
BETA