PIC32MX575F256H CFG registers

The 3 registers of CFG (Configuration and pin control), from 0xBF80F200, with their reset value and every field. The PIC32MX575F256H has 554 registers in 62 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

CFG Configuration and pin control

DDPCON

Address
0xBF80F200
Reset
0x00000008
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
JTAGEN3JTAG Port Enable bit
  • 0 Disable the JTAG port
  • 1 Enable the JTAG port
TROEN2Trace Output Enable bit
  • 0 Disable trace outputs and stop trace clock
  • 1 Enable trace outputs and start trace clock (trace probe must be present)
TDOEN0TDO Enable for 2-Wire JTAG
  • 0 2-wire JTAG protocol does not use TDO
  • 1 2-wire JTAG protocol uses TDO

DEVID

Address
0xBF80F220
Reset
0x00000000
Access
read only
Size
32-bit
2 fields
FieldBitsWhat it does
VER28
DEVID27:0

SYSKEY

Address
0xBF80F230
Reset
0x00000000
Access
read only
Size
32-bit