The 3 registers of TMR4 (Timer 4), from 0xBF800C00, with their reset value and every field. The PIC32MX795F512H has 774 registers in 64 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
TMR4 Timer 4
T4CONType B Timer Control Register
Address
0xBF800C00
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
ON
15
Timer On bit
0 Module is disabled
1 Module is enabled
SIDL
13
Stop in Idle Mode bit
0 Continue operation even in Idle mode
1 Discontinue operation when device enters Idle mode
TGATE
7
Timer Gated Time Accumulation Enable bit
0 (When TCS is 1): This bit is ignored and is read as 0 / (When TCS=0): Gated time accumulation is disabled
1 (When TCS is 1): This bit is ignored and is read as 0 / (When TCS=0): Gated time accumulation is enabled
TCKPS
6:4
Timer Input Clock Prescale Select bits
0 1:1 prescale value
1 1:2 prescale value
2 1:4 prescale value
3 1:8 prescale value
4 1:16 prescale value
5 1:32 prescale value
6 1:64 prescale value
7 1:256 prescale value
T32
3
32-Bit Timer Mode Select bit
0 Odd numbered and even numbered timers form separate 16-bit timers
1 Odd numbered and even numbered timers form a 32-bit timer
BETA