PIC32MZ1024ECM100 CRYPTO registers The 10 registers of CRYPTO (Crypto engine), from 0xBF8E5000, with their reset value and every field. The PIC32MZ1024ECM100 has 1565 registers in 92 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
CRYPTO Crypto engine CEVER
Address 0xBF8E5000
Reset 0x00000000
Access read only
Size 32-bit 3 fields
Field Bits What it does VERSION 23:16 ID 15:0 REVISION 31:24
CECON
Address 0xBF8E5004
Reset 0x00000000
Access read/write
Size 32-bit 5 fields
Field Bits What it does SWRST 6 SWAPEN 5 BDPCHST 2 BDPPLEN 1 DMAEN 0
CEBDADDR
Address 0xBF8E5008
Reset 0x00000000
Access read only
Size 32-bit 1 field
Field Bits What it does BDPADDR 31:0
CEBDPADDR
Address 0xBF8E500C
Reset 0x00000000
Access read only
Size 32-bit 1 field
Field Bits What it does BASEADDR 31:0
CESTAT
Address 0xBF8E5010
Reset 0x00000000
Access read only
Size 32-bit 7 fields
Field Bits What it does ERROP 28:26 ERRPHASE 25:24 BDSTATE 21:18 START 17 ACTIVE 16 BDCTRL 15:0 ERRMODE 31:29
CEINTSRC
Address 0xBF8E5014
Reset 0x00000000
Access read only
Size 32-bit 4 fields
Field Bits What it does AREIF 3 PKTIF 2 CBDIF 1 PENDIF 0
CEINTEN
Address 0xBF8E5018
Reset 0x00000000
Access read/write
Size 32-bit 4 fields
Field Bits What it does AREIE 3 PKTIE 2 CBDIE 1 PENDIE 0
CEPOLLCON
Address 0xBF8E501C
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does BDPPLCON 15:0
CEHDLEN
Address 0xBF8E5020
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does HDRLEN 7:0
CETRLLEN
Address 0xBF8E5024
Reset 0x00000000
Access read/write
Size 32-bit 1 field
Field Bits What it does TRLRLEN 7:0
BETA